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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL02EPF0001A101.mail.protection.outlook.com (10.167.241.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7519.19 via Frontend Transport; Thu, 25 Apr 2024 20:17:16 +0000 Received: from bmoger-ubuntu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 25 Apr 2024 15:17:16 -0500 From: Babu Moger To: , , CC: , , , , , , Subject: [PATCH v2 0/4] selftests/resctrl: Enable MBM and MBA tests on AMD Date: Thu, 25 Apr 2024 15:16:58 -0500 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A101:EE_|SN7PR12MB7023:EE_ X-MS-Office365-Filtering-Correlation-Id: c1b59ebf-8615-474f-d828-08dc6564b3c5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: C1Ypqb9pllalvaeoqjrKaFSWN2aZdstZenZE7tYYxrTUf9zN74WYXsFvevfZLUdsj8KSlN/0t58YNqoH5QNqRQlu1dBrARrUiKYChSR2aiBxIfv5OMq3MTbSz+STI0EM4kXzmUHt1jqdhHbnGxE1CUqjNJgnR8J0Vyhhe+V8A2n1n04C0zXVXZI8cgZeW2rfNUQF3N81UsQBfWRkg5dT0vytOShNDDSUsve/yA+mllhq3NwN7cWPQwtbb7zIpkEg6Ijrc/D6KFfYdnF3LKqEC3ii/5KHAFPHdhS6WJUosZ4Q/c2SCSdNdKB8l7FRHSHjkvVDK8IE9g0HpYWjap9fyvJcnZKVeVh8KQ/CAth69m+tqrU4UnMlOCEsDAP7XlOQsQNe7m8FgCRHw/qMQ+hFoWXKGqQGOtNSop8NtHl1H4a1gpo/smy9QZuIy8/YXDt0wYXMUoI7Fu+irG6KZUjh6U3XytiWm0L/xj0/6zMND8dVo0phmU1kLwgiomE3xV/FANjapEmRLqssa7xnmA/tE7thLCVMjmECSLzWZruXktOZiDgJYKWD8u2pTMhAiivdC92xMg4r7CaE47ABr8+9WYKf5gH20YHBuCJ5K3FyWD0Dynif/hTthXvLDRSxwkUvO+H4uE18ZLb8Eu2/IEggp6lexvehY4Kk7rSwwhKUjoSwAz37KpMqu0HhGdvIQ7mvVrlm9KSBKzfvj0OVel2o8SMz33ZkvnhjPP7HkY2dJdbbZeKsaGZR4/aenqg8nH5XFE6EHrrqk8rZS2dn9juuBwxspOmvuS2icUth2UVPqXJMIllk5AnjJTAkf1iNkN+MQQmyY2xvkU8toe1h6Ytf2xfOzAfJkReVvFcU/ktzfX/JesvQWnXnePqqwu7lHG50yZkSrKchUH2f9nHyX8y0AQB4wGck6rfdj614mH86xbDs77Zjne4eRdjSzKwsFPCnTb5zPKbGBEMMsOf2yWA232ewtMLsn3TcxgoD3qeWwezGo2nPNcUKfsm0KMIKlTXVmQmE8tK8Qxcl5EMnyBzs+ZfzmWpaX4Opgli8sonS4UPr/3mV6hGUSf6uDexcxIa43UqzWsNqIqJE96p29cDB8ry1/l+DLnrxc6OsADh0R81Txz/21LDBCgZL7TUIGX/gMijR+tmslJdF9wyT+CoLuP04xY+tvlto3tQe8xIZtQADJrjxTXN8K35+/qm9cS9QgrUsAxJ5UMSERD8+MeiQjdC0Nyx8Tew3FMjt93Wr6Mc9oQGtm0JQtMmWMPmjUmcdp6ZAMUfNfCJqeL4DI092a4BM1FCG9SPawJeREBCqLqzSlgJadyl3yGku7A7dNDEVa3gPURLiTJYkxqUyOIv7RQH6I6oiyvmbSZ89T5UPn4uNsniQgBXsJrMDKmg+cT+L X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(36860700004)(82310400014)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 20:17:16.6521 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c1b59ebf-8615-474f-d828-08dc6564b3c5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A101.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7023 The MBM (Memory Bandwidth Monitoring) and MBA (Memory Bandwidth Allocation) features are not enabled for AMD systems. The reason was lack of perf counters to compare the resctrl test results. Starting with the commit 25e56847821f ("perf/x86/amd/uncore: Add memory controller support"), AMD now supports the UMC (Unified Memory Controller) perf events. These events can be used to compare the test results. This series adds the support to detect the UMC events and enable MBM/MBA tests for AMD systems. v2: Changes. a. Rebased on top of tip/master (Apr 25, 2024) b. Addressed Ilpo comments except the one about close call. It seems more clear to keep READ and WRITE separate. https://lore.kernel.org/lkml/8e4badb7-6cc5-61f1-e041-d902209a90d5@linux.intel.com/ c. Used ksft_perror call when applicable. d. Added vendor check for non contiguous CBM check. v1: https://lore.kernel.org/lkml/cover.1708637563.git.babu.moger@amd.com/ Babu Moger (4): selftests/resctrl: Rename variable imcs and num_of_imcs() to generic names selftests/resctrl: Pass sysfs controller name of the vendor selftests/resctrl: Add support for MBM and MBA tests on AMD selftests/resctrl: Enable MBA/MBA tests on AMD tools/testing/selftests/resctrl/cat_test.c | 2 +- tools/testing/selftests/resctrl/mba_test.c | 1 - tools/testing/selftests/resctrl/mbm_test.c | 1 - tools/testing/selftests/resctrl/resctrl_val.c | 142 +++++++++++++----- 4 files changed, 103 insertions(+), 43 deletions(-)