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The force shutdown time is configured in LPCR[17:16] BTN_PRESS_TIME: * b00: 5 seconds (SoC default) * b01: 10 seconds * b10: 15 seconds * b11: PMIC is not disabled Signed-off-by: Ian Ray --- .../arm64/boot/dts/freescale/imx8mp-ppdv2.dts | 4 ++++ drivers/input/keyboard/snvs_pwrkey.c | 24 +++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-ppdv2.dts b/arch/arm64/boot/dts/freescale/imx8mp-ppdv2.dts index 7cc427f23e59..921eda35154a 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-ppdv2.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-ppdv2.dts @@ -699,6 +699,10 @@ &pinctrl_usdhc2_200mhz { ; }; +&snvs_pwrkey { + force-shutdown-time = <0>; +}; + &usdhc2 { /delete-property/ cd-gpios; /delete-property/ wp-gpios; diff --git a/drivers/input/keyboard/snvs_pwrkey.c b/drivers/input/keyboard/snvs_pwrkey.c index f7b5f1e25c80..2ba848df061c 100644 --- a/drivers/input/keyboard/snvs_pwrkey.c +++ b/drivers/input/keyboard/snvs_pwrkey.c @@ -27,7 +27,10 @@ #define SNVS_HPSR_BTN BIT(6) #define SNVS_LPSR_SPO BIT(18) #define SNVS_LPCR_DEP_EN BIT(5) +#define SNVS_LPCR_BPT_SHIFT 16 +#define SNVS_LPCR_BPT_MASK (3 << SNVS_LPCR_BPT_SHIFT) +#define FORCE_SHUTDOWN_TIME 5 /* LPCR 17:16 default */ #define DEBOUNCE_TIME 30 #define REPEAT_INTERVAL 60 @@ -114,6 +117,8 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) struct device_node *np; struct clk *clk; int error; + int force_shutdown_time; + int bpt; u32 vid; /* Get SNVS register Page */ @@ -148,11 +153,30 @@ static int imx_snvs_pwrkey_probe(struct platform_device *pdev) if (pdata->irq < 0) return -EINVAL; + force_shutdown_time = FORCE_SHUTDOWN_TIME; + of_property_read_u32(np, "force-shutdown-time", &force_shutdown_time); + switch (force_shutdown_time) { + case 0: + /* Disable long-press detection. */ + bpt = 0x3; + break; + case 5: + case 10: + case 15: + bpt = (force_shutdown_time / 5) - 1; + break; + default: + dev_err(&pdev->dev, "Invalid force-shutdown-time %d\n", force_shutdown_time); + return -EINVAL; + } + regmap_read(pdata->snvs, SNVS_HPVIDR1_REG, &vid); pdata->minor_rev = vid & 0xff; regmap_update_bits(pdata->snvs, SNVS_LPCR_REG, SNVS_LPCR_DEP_EN, SNVS_LPCR_DEP_EN); + regmap_update_bits(pdata->snvs, SNVS_LPCR_REG, SNVS_LPCR_BPT_MASK, bpt << SNVS_LPCR_BPT_SHIFT); + /* clear the unexpected interrupt before driver ready */ regmap_write(pdata->snvs, SNVS_LPSR_REG, SNVS_LPSR_SPO);