From patchwork Wed Jul 20 08:29:07 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 72402 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp521594qga; Wed, 20 Jul 2016 01:30:11 -0700 (PDT) X-Received: by 10.66.189.199 with SMTP id gk7mr73784949pac.158.1469003411241; Wed, 20 Jul 2016 01:30:11 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m5si2209632paa.156.2016.07.20.01.30.11; Wed, 20 Jul 2016 01:30:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-input-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-input-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-input-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753234AbcGTIaA (ORCPT + 1 other); Wed, 20 Jul 2016 04:30:00 -0400 Received: from down.free-electrons.com ([37.187.137.238]:41182 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753033AbcGTI3y (ORCPT ); Wed, 20 Jul 2016 04:29:54 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id E4FE6603; Wed, 20 Jul 2016 10:29:52 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from quentin-Latitude-E6320.home (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 7E5681BC; Wed, 20 Jul 2016 10:29:42 +0200 (CEST) From: Quentin Schulz To: jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, maxime.ripard@free-electrons.com, wens@csie.org, dmitry.torokhov@gmail.com, lee.jones@linaro.org Cc: Quentin Schulz , antoine.tenart@free-electrons.com, thomas.petazzoni@free-electrons.com, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH 1/5] mfd: sunxi-gpadc-mfd: add TP_UP_PENDING irq Date: Wed, 20 Jul 2016 10:29:07 +0200 Message-Id: <1469003351-15263-2-git-send-email-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1469003351-15263-1-git-send-email-quentin.schulz@free-electrons.com> References: <1469003351-15263-1-git-send-email-quentin.schulz@free-electrons.com> Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org This adds support for TP_UP_PENDING irq in Allwinner SoCs' GPADC's MFD. This interrupt occurs when a touchscreen is attached and the thing (stylus, finger) currently touching the touchscreen releases the touch. Signed-off-by: Quentin Schulz --- drivers/mfd/sunxi-gpadc-mfd.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-input" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mfd/sunxi-gpadc-mfd.c b/drivers/mfd/sunxi-gpadc-mfd.c index f0005a6..05a000b 100644 --- a/drivers/mfd/sunxi-gpadc-mfd.c +++ b/drivers/mfd/sunxi-gpadc-mfd.c @@ -19,6 +19,8 @@ #define SUNXI_IRQ_FIFO_DATA 0 #define SUNXI_IRQ_TEMP_DATA 1 +#define SUNXI_IRQ_TP_UP 2 + static struct resource adc_resources[] = { { @@ -34,9 +36,19 @@ static struct resource adc_resources[] = { }, }; +static struct resource ts_resources[] = { + { + .name = "TP_UP_PENDING", + .start = SUNXI_IRQ_TP_UP, + .end = SUNXI_IRQ_TP_UP, + .flags = IORESOURCE_IRQ, + }, +}; + static const struct regmap_irq sunxi_gpadc_mfd_regmap_irq[] = { REGMAP_IRQ_REG(SUNXI_IRQ_FIFO_DATA, 0, BIT(16)), REGMAP_IRQ_REG(SUNXI_IRQ_TEMP_DATA, 0, BIT(18)), + REGMAP_IRQ_REG(SUNXI_IRQ_TP_UP, 0, BIT(1)), }; static const struct regmap_irq_chip sunxi_gpadc_mfd_regmap_irq_chip = {