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Mon, 13 Jan 2025 04:26:58 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Geert Uytterhoeven , Wolfram Sang , Andy Shevchenko , Philipp Zabel Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar , Claudiu Beznea Subject: [PATCH v6 04/10] i2c: riic: Use BIT macro consistently Date: Mon, 13 Jan 2025 12:26:37 +0000 Message-ID: <20250113122643.819379-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250113122643.819379-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250113122643.819379-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Easier to read and ensures proper types. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Tested-by: Wolfram Sang Tested-by: Claudiu Beznea Reviewed-by: Claudiu Beznea --- v4->v6 - Used linux/bits.h - Since the changes were small, I've kept the RB/TB tags. v3->v4 - Included bits.h - Since the changes were small, I've kept the RB/TB tags. v2->v3 - Collected RB and tested tags v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 37 ++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 18 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index c555b6220e66..370cb83bf5ac 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -34,6 +34,7 @@ * Also check the comments in the interrupt routines for some gory details. */ +#include #include #include #include @@ -46,32 +47,32 @@ #include #include -#define ICCR1_ICE 0x80 -#define ICCR1_IICRST 0x40 -#define ICCR1_SOWP 0x10 +#define ICCR1_ICE BIT(7) +#define ICCR1_IICRST BIT(6) +#define ICCR1_SOWP BIT(4) -#define ICCR2_BBSY 0x80 -#define ICCR2_SP 0x08 -#define ICCR2_RS 0x04 -#define ICCR2_ST 0x02 +#define ICCR2_BBSY BIT(7) +#define ICCR2_SP BIT(3) +#define ICCR2_RS BIT(2) +#define ICCR2_ST BIT(1) #define ICMR1_CKS_MASK 0x70 -#define ICMR1_BCWP 0x08 +#define ICMR1_BCWP BIT(3) #define ICMR1_CKS(_x) ((((_x) << 4) & ICMR1_CKS_MASK) | ICMR1_BCWP) -#define ICMR3_RDRFS 0x20 -#define ICMR3_ACKWP 0x10 -#define ICMR3_ACKBT 0x08 +#define ICMR3_RDRFS BIT(5) +#define ICMR3_ACKWP BIT(4) +#define ICMR3_ACKBT BIT(3) -#define ICFER_FMPE 0x80 +#define ICFER_FMPE BIT(7) -#define ICIER_TIE 0x80 -#define ICIER_TEIE 0x40 -#define ICIER_RIE 0x20 -#define ICIER_NAKIE 0x10 -#define ICIER_SPIE 0x08 +#define ICIER_TIE BIT(7) +#define ICIER_TEIE BIT(6) +#define ICIER_RIE BIT(5) +#define ICIER_NAKIE BIT(4) +#define ICIER_SPIE BIT(3) -#define ICSR2_NACKF 0x10 +#define ICSR2_NACKF BIT(4) #define ICBR_RESERVED 0xe0 /* Should be 1 on writes */