From patchwork Mon Oct 7 03:52:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Chen X-Patchwork-Id: 833438 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB0124500E; Mon, 7 Oct 2024 03:52:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728273161; cv=none; b=hqtkeNHPn6hBQZjfd4YSWu2KmjbLvhQCjilvScYBdDzCIXcCJDVMBNvc7np6yVfF+M4xP2LrVMJrB+3yPvsEcRngiFH6Z91UORS8SZ5pRdmRF8DpvDgSKa4Q4zkwKiDO3QSBfXjdvq5bKuLUKu8+EajJr4Js46ajfSAeOURkDzw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728273161; c=relaxed/simple; bh=gL5P2LFCy9cfkiLJQvYGwMfghJDL7YYWnVxa6R6505A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AAZhhZYyyLcOamG6+BmrupIm+pgYbvz0XaXMuwew8VYIhRs2Qiz1oHnzQ8x/chxj/pydy1fMfIhOLAU8X0ax7S19GVdCxX0QKIgaSioe/6yfr0D1FddsJs3mjK1QKxrjsu2HefNGibvzEjpDclXUN1lpweF4FZfI2YXhjo6HrbA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.12; Mon, 7 Oct 2024 11:52:35 +0800 Received: from twmbx02.aspeed.com (192.168.10.152) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1258.12 via Frontend Transport; Mon, 7 Oct 2024 11:52:35 +0800 From: Ryan Chen To: , , , , , , , , , , , , , , , , CC: Krzysztof Kozlowski Subject: [PATCH v15 1/3] dt-bindings: i2c: aspeed: support for AST2600-i2cv2 Date: Mon, 7 Oct 2024 11:52:33 +0800 Message-ID: <20241007035235.2254138-2-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241007035235.2254138-1-ryan_chen@aspeedtech.com> References: <20241007035235.2254138-1-ryan_chen@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add ast2600-i2cv2 compatible and aspeed,global-regs, aspeed,enable-dma and description for ast2600-i2cv2. Signed-off-by: Ryan Chen Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/i2c/aspeed,i2c.yaml | 51 +++++++++++++++++-- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml index 6df27b47b922..6c16fc76c978 100644 --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml @@ -9,9 +9,6 @@ title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs maintainers: - Rayn Chen -allOf: - - $ref: /schemas/i2c/i2c-controller.yaml# - properties: compatible: enum: @@ -49,12 +46,50 @@ properties: description: states that there is another master active on this bus + aspeed,enable-dma: + type: boolean + description: | + I2C bus enable dma mode transfer. + + ASPEED ast2600 platform equipped with 16 I2C controllers that share a + single DMA engine. DTS files can specify the data transfer mode to/from + the device, either DMA or programmed I/O. However, hardware limitations + may require a DTS to manually allocate which controller can use DMA mode. + The "aspeed,enable-dma" property allows control of this. + + In cases where one the hardware design results in a specific + controller handling a larger amount of data, a DTS would likely + enable DMA mode for that one controller. + + aspeed,global-regs: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of i2c global register node. + required: - reg - compatible - clocks - resets +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + - if: + properties: + compatible: + contains: + const: aspeed,ast2600-i2cv2 + + then: + properties: + reg: + minItems: 2 + required: + - aspeed,global-regs + else: + properties: + aspeed,global-regs: false + aspeed,enable-dma: false + unevaluatedProperties: false examples: @@ -71,3 +106,13 @@ examples: interrupts = <0>; interrupt-parent = <&i2c_ic>; }; + - | + #include + i2c1: i2c@80 { + compatible = "aspeed,ast2600-i2cv2"; + reg = <0x80 0x80>, <0xc00 0x20>; + aspeed,global-regs = <&i2c_global>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_I2C>; + interrupts = ; + };