From patchwork Fri Jun 21 11:22:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 806425 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F05C176ACD for ; Fri, 21 Jun 2024 11:23:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718969010; cv=none; b=d30/2y+pTrP/8/WH81i2O6SiFxolHq7Z38dzQSUfQqRVeJrD2Z5JRGp6Aj0VNgHeg0NVXLMMz0hxyW4t4Hassmv1aTFIW7STcLVglx01K9VtDiOtatvrSNyKdN16ZnUaPndi6VzyPrkvsI/2u4bf2NUvMTUsjqSG2tUCSUYb43I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718969010; c=relaxed/simple; bh=HPttF8PMIfMdD0q3vRsNpNkTZTwvPxmdjIPSC65SLag=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=S0oLDA/PSnVIH+R5LDQSGTFDRVjecv/TjKtK3jfFtCuEgrbuWYuFBuuMe3yhbPneL/E6/kVc/f/XJnBWC3WlqEHhHDEgWstvyXHUXjr/bHAGchE2dNkY4cC2IiIotm2Q4FBgt9EA9YCs2d9c4V56uge869gyRM7Fv/kOhQwF71s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev; spf=pass smtp.mailfrom=tuxon.dev; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b=AFVzbYTP; arc=none smtp.client-ip=209.85.218.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=tuxon.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tuxon.dev header.i=@tuxon.dev header.b="AFVzbYTP" Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-a6f7b785a01so204546666b.1 for ; Fri, 21 Jun 2024 04:23:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuxon.dev; s=google; t=1718969007; x=1719573807; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TB4G6RBUncwv9ha85OdZCXvfKxm1R3567nIHgdG02RA=; b=AFVzbYTPrs7tpSfVyar+gnjV8v+AvLQeKeRXyIdAV1fx8vJ6nNGPZWDhN1AIPtGrJa um/eMLBe0Mcyi0uEe2kIjuSHL/dsG/E2dWgjdZ/6V9nTPE+mc//I0MtAi1mvREh6ZAt9 Anooj6gMP6iO01rMulWRRiOG6yub36AKmwI/e3+2a0a0ZIGPW5mUG333HOjb/YLj7qst J7dAws99LOHPJAvqfu73JaLhiGaSr0nAOpewgNZL+5zYC7m2jFHXyYs0FNy20rgOxJZ6 8hGcLJucbu1XtDlPKWL3/weokY5VbL2GlFgYxtukoxWX31SI3MtE3rGBhugQXNf2kRnH eEHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718969007; x=1719573807; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TB4G6RBUncwv9ha85OdZCXvfKxm1R3567nIHgdG02RA=; b=DMYOwWutzzKgZgTqIq/xUX42id+GdPvdDPTmVxbKEHuwOoGD8UxQA0r9jsHBONbwwg 0jCCkFrEgH1qNDAp+9azq/JVUwt4FgARfxbioqTEdzr0wYS9e9Gfq105/ciDDjE5P8RL VgSQsnRFudtGJtGGG29mWZwyio1rITwUz1UrM0IyNgfhmg/VVZvCRYo7Ju7AhZIYhOiI z7wp4IwzrG71snXIfTh1xfByW//c0vJgOhv8jusnwZ5SwuXmwmecRC/m2t5BEpdDrk8+ U1YfID3P+Hi2AiTNxDowCAsjb6lPIp7GUAJNgBwt9em19pLFAwGfmnhPgSwRyIV+l91B Xvcw== X-Forwarded-Encrypted: i=1; AJvYcCXlkuq+qI1Z8tyLS+XPf25LA0aDq9zhRuCeF7ofejs/TwlX1SZy9wyaju2YZxjzGlKG8QumtCY6Z14GfDnaNmX8caD8+k7K1R2C X-Gm-Message-State: AOJu0Yw2VGzoxXfv3BcjehXUNFz1gDWvcKGK7l9WJ5CES7zckcapkStq JAxwJ0y9TMgWzIdpt0PcfAdaPuw+JQsaWgzJDeuYQb0Bh0ROI4KTM7o30vXGGaU= X-Google-Smtp-Source: AGHT+IHR6ZQF+USh+Vr/BefMKv7g9tmizkZF6pClxkCR0ycBdTVyYUBcww2griHlTmLatTTejdlU7Q== X-Received: by 2002:a17:907:6a13:b0:a6f:24fe:f2a7 with SMTP id a640c23a62f3a-a6fab6031e1mr489221866b.10.1718969007614; Fri, 21 Jun 2024 04:23:27 -0700 (PDT) Received: from claudiu-X670E-Pro-RS.. ([82.78.167.70]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6fd0838345sm64498466b.99.2024.06.21.04.23.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jun 2024 04:23:27 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: chris.brandt@renesas.com, andi.shyti@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, wsa+renesas@sang-engineering.com Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH 06/12] i2c: riic: Add suspend/resume support Date: Fri, 21 Jun 2024 14:22:57 +0300 Message-Id: <20240621112303.1607621-7-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240621112303.1607621-1-claudiu.beznea.uj@bp.renesas.com> References: <20240621112303.1607621-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea Add suspend/resume support for the RIIC driver. This is necessary for the Renesas RZ/G3S SoC which support suspend to deep sleep state where power to most of the SoC components is turned off. As a result the I2C controller needs to be reconfigured after suspend/resume. For this, the reset line was stored in the driver private data structure as well as i2c timings. The reset line and I2C timings are necessary to re-initialize the controller after resume. Signed-off-by: Claudiu Beznea --- drivers/i2c/busses/i2c-riic.c | 66 +++++++++++++++++++++++++++++------ 1 file changed, 55 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 00fb09786e48..f9b9e92570d8 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -105,6 +105,8 @@ struct riic_dev { struct completion msg_done; struct i2c_adapter adapter; struct clk *clk; + struct reset_control *rstc; + struct i2c_timings i2c_t; }; struct riic_irq_desc { @@ -306,11 +308,12 @@ static const struct i2c_algorithm riic_algo = { .functionality = riic_func, }; -static int riic_init_hw(struct riic_dev *riic, struct i2c_timings *t) +static int riic_init_hw(struct riic_dev *riic) { int ret; unsigned long rate; int total_ticks, cks, brl, brh; + struct i2c_timings *t = &riic->i2c_t; struct device *dev = riic->adapter.dev.parent; if (t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) { @@ -429,8 +432,6 @@ static int riic_i2c_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct riic_dev *riic; struct i2c_adapter *adap; - struct i2c_timings i2c_t; - struct reset_control *rstc; int i, ret; riic = devm_kzalloc(dev, sizeof(*riic), GFP_KERNEL); @@ -447,16 +448,16 @@ static int riic_i2c_probe(struct platform_device *pdev) return PTR_ERR(riic->clk); } - rstc = devm_reset_control_get_optional_exclusive(dev, NULL); - if (IS_ERR(rstc)) - return dev_err_probe(dev, PTR_ERR(rstc), + riic->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); + if (IS_ERR(riic->rstc)) + return dev_err_probe(dev, PTR_ERR(riic->rstc), "Error: missing reset ctrl\n"); - ret = reset_control_deassert(rstc); + ret = reset_control_deassert(riic->rstc); if (ret) return ret; - ret = devm_add_action_or_reset(dev, riic_reset_control_assert, rstc); + ret = devm_add_action_or_reset(dev, riic_reset_control_assert, riic->rstc); if (ret) return ret; @@ -485,13 +486,13 @@ static int riic_i2c_probe(struct platform_device *pdev) init_completion(&riic->msg_done); - i2c_parse_fw_timings(dev, &i2c_t, true); + i2c_parse_fw_timings(dev, &riic->i2c_t, true); pm_runtime_set_autosuspend_delay(dev, 0); pm_runtime_use_autosuspend(dev); pm_runtime_enable(dev); - ret = riic_init_hw(riic, &i2c_t); + ret = riic_init_hw(riic); if (ret) goto out; @@ -501,7 +502,7 @@ static int riic_i2c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, riic); - dev_info(dev, "registered with %dHz bus speed\n", i2c_t.bus_freq_hz); + dev_info(dev, "registered with %dHz bus speed\n", riic->i2c_t.bus_freq_hz); return 0; out: @@ -561,6 +562,48 @@ static const struct riic_of_data riic_rz_v2h_info = { }, }; +static int riic_i2c_suspend(struct device *dev) +{ + struct riic_dev *riic = dev_get_drvdata(dev); + int ret; + + ret = pm_runtime_resume_and_get(dev); + if (ret) + return ret; + + i2c_mark_adapter_suspended(&riic->adapter); + + /* Disable output on SDA, SCL pins. */ + riic_clear_set_bit(riic, ICCR1_ICE, 0, RIIC_ICCR1); + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_sync(dev); + + return reset_control_assert(riic->rstc); +} + +static int riic_i2c_resume(struct device *dev) +{ + struct riic_dev *riic = dev_get_drvdata(dev); + int ret; + + ret = reset_control_deassert(riic->rstc); + if (ret) + return ret; + + ret = riic_init_hw(riic); + if (ret) + return ret; + + i2c_mark_adapter_resumed(&riic->adapter); + + return 0; +} + +static const struct dev_pm_ops riic_i2c_pm_ops = { + SYSTEM_SLEEP_PM_OPS(riic_i2c_suspend, riic_i2c_resume) +}; + static const struct of_device_id riic_i2c_dt_ids[] = { { .compatible = "renesas,riic-rz", .data = &riic_rz_a_info }, { .compatible = "renesas,riic-r9a09g057", .data = &riic_rz_v2h_info }, @@ -573,6 +616,7 @@ static struct platform_driver riic_i2c_driver = { .driver = { .name = "i2c-riic", .of_match_table = riic_i2c_dt_ids, + .pm = pm_ptr(&riic_i2c_pm_ops), }, };