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The isl1208 is exposed behind this mux. Add the mux node and isl1208 as a default device. Signed-off-by: Farouk Bouabid --- arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 33 +++++++++++++++++++------ 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index bb1aea82e666..cb84295f118d 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -9,6 +9,7 @@ / { aliases { + i2c10 = &i2c10; mmc0 = &emmc; mmc1 = &sdio; rtc0 = &rtc_twi; @@ -291,15 +292,33 @@ &i2c1 { /* SE05x is limited to Fast Mode */ clock-frequency = <400000>; - fan: fan@18 { - compatible = "ti,amc6821"; + mule@18 { + compatible = "tsd,mule"; reg = <0x18>; - #cooling-cells = <2>; - }; + #address-cells = <1>; + #size-cells = <0>; + + fan: fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + }; + + i2c-mux { + compatible = "tsd,mule-i2c-mux"; + #address-cells = <1>; + #size-cells = <0>; - rtc_twi: rtc@6f { - compatible = "isil,isl1208"; - reg = <0x6f>; + i2c10: i2c@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; + }; + }; }; };