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Wed, 05 Jun 2024 21:23:22 +0000 Received: from smtpav06.dal12v.mail.ibm.com (smtpav06.dal12v.mail.ibm.com [10.241.53.105]) by smtprelay01.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 455LNJew40042804 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 5 Jun 2024 21:23:21 GMT Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id ED52A58066; Wed, 5 Jun 2024 21:23:18 +0000 (GMT) Received: from smtpav06.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B1DA358063; Wed, 5 Jun 2024 21:23:18 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.121.242]) by smtpav06.dal12v.mail.ibm.com (Postfix) with ESMTP; Wed, 5 Jun 2024 21:23:18 +0000 (GMT) From: Eddie James To: linux-fsi@lists.ozlabs.org Cc: eajames@linux.ibm.com, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, broonie@kernel.org, andi.shyti@kernel.org, joel@jms.id.au, alistair@popple.id.au, jk@ozlabs.org, andrew@codeconstruct.com.au, linux-aspeed@lists.ozlabs.org, ninad@linux.ibm.com, lakshmiy@us.ibm.com Subject: [PATCH v4 18/40] fsi: aspeed: Don't clear all IRQs during OPB transfers Date: Wed, 5 Jun 2024 16:22:50 -0500 Message-Id: <20240605212312.349188-19-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240605212312.349188-1-eajames@linux.ibm.com> References: <20240605212312.349188-1-eajames@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: UiNXHZseH_KlB6lbNa7IxWdp0FQw7QVl X-Proofpoint-GUID: UiNXHZseH_KlB6lbNa7IxWdp0FQw7QVl X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-05_02,2024-06-05_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 mlxscore=0 suspectscore=0 malwarescore=0 impostorscore=0 phishscore=0 adultscore=0 clxscore=1015 mlxlogscore=999 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406050160 In order to support FSI interrupts, the OPB transfer functions should not clear all the IRQs pending. Instead, just write the OPB ACK bit to the IRQ status register. As commented, this register invisibly masks the interrupt once the interrupt condition is cleared. Fix this by writing 0 before each OPB transfer. Signed-off-by: Eddie James --- drivers/fsi/fsi-master-aspeed.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/fsi/fsi-master-aspeed.c b/drivers/fsi/fsi-master-aspeed.c index 04aa5cb9b6fad..f840c7c4a56b9 100644 --- a/drivers/fsi/fsi-master-aspeed.c +++ b/drivers/fsi/fsi-master-aspeed.c @@ -47,6 +47,11 @@ static const u32 fsi_base = 0xa0000000; #define OPB_CLK_SYNC 0x3c #define OPB_IRQ_CLEAR 0x40 #define OPB_IRQ_MASK 0x44 +/* + * This register does NOT behave in the expected manner. It is expected that writing 1b would clear + * the corresponding interrupt condition. However it also invisibly masks the interrupt! Writing 0b + * unmasks again. + */ #define OPB_IRQ_STATUS 0x48 #define OPB0_SELECT 0x10 @@ -113,13 +118,14 @@ static int __opb_write(struct fsi_master_aspeed *aspeed, u32 addr, writel_relaxed(transfer_size, base + OPB0_XFER_SIZE); writel_relaxed(addr, base + OPB0_FSI_ADDR); writel_relaxed(val, base + OPB0_FSI_DATA_W); - writel_relaxed(0x1, base + OPB_IRQ_CLEAR); + writel_relaxed(0, base + OPB_IRQ_STATUS); writel(0x1, base + OPB_TRIGGER); ret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg, (reg & OPB0_XFER_ACK_EN) != 0, 0, OPB_POLL_TIMEOUT); + writel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS); status = readl(base + OPB0_STATUS); /* Return error when poll timed out */ @@ -165,13 +171,14 @@ static int __opb_read(struct fsi_master_aspeed *aspeed, uint32_t addr, writel_relaxed(CMD_READ, base + OPB0_RW); writel_relaxed(transfer_size, base + OPB0_XFER_SIZE); writel_relaxed(addr, base + OPB0_FSI_ADDR); - writel_relaxed(0x1, base + OPB_IRQ_CLEAR); + writel_relaxed(0, aspeed->base + OPB_IRQ_STATUS); writel(0x1, base + OPB_TRIGGER); ret = readl_poll_timeout(base + OPB_IRQ_STATUS, reg, (reg & OPB0_XFER_ACK_EN) != 0, 0, OPB_POLL_TIMEOUT); + writel(OPB0_XFER_ACK_EN, base + OPB_IRQ_STATUS); status = readl(base + OPB0_STATUS); result = readl(base + OPB0_FSI_DATA_R); @@ -530,8 +537,6 @@ static int fsi_master_aspeed_probe(struct platform_device *pdev) } writel(0x1, aspeed->base + OPB_CLK_SYNC); - writel(OPB1_XFER_ACK_EN | OPB0_XFER_ACK_EN, - aspeed->base + OPB_IRQ_MASK); writel(opb_retry_counter, aspeed->base + OPB_RETRY_COUNTER);