From patchwork Fri May 17 09:09:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Bonnefille X-Patchwork-Id: 797541 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97B661EB5E; Fri, 17 May 2024 09:10:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937025; cv=none; b=hpbIsIE6YaW7QTMO2heqnMT9WAfJBzEmL861l7wdHnjEGBISDq8sjWsoumijTN/c0o6i7D510LJ3P3e+QKoCFN+W5hN09GhXjuKA8yQUfzg+K8eff8W8Nb46Db1iUZCiUgFC/4UeF58C0UPnZ2FIRz0J7yzQmXdV8cln63cYKfs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715937025; c=relaxed/simple; bh=hVTKaOdFd5y5mLvWZP8L+mL1dgZD08ji4w/qOVYb6SQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nrGWh5iejTZ3b4BNUdDWUoZtoAA+fdP6PWkUMc2qIsTCuwUlrsFB9Xoa9XVhnx9ZpXJ3ro7KTGN7kegj94TLMp8xUUIRFfmTZwpu3bX6Ki0dPg9iGN7sP3ajvdjyIokOvR1xsSuO6vreqHSOJQW9r6M3Ss+CfSDvN2dKPcrm5a4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=A7Sibcpp; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="A7Sibcpp" Received: by mail.gandi.net (Postfix) with ESMTPSA id CBE952000D; Fri, 17 May 2024 09:10:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1715937015; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EwF/BXW9VuWyeGGtBGV6L8qqYk6pudzw8mEgBwrvKoE=; b=A7Sibcpp7VdAE4eFezK6+SgcyDBETp+BQszGyTDm2sWcMBlnnD3GRRTuWhGwo+/epLz1VF 8h0LOHICpOrlxlkh8oUUETFz6ZsRpAaRFadsD4pq9AqPRWfJ2z36uf2LV4A9FRbfyvO6ez G6QOU5slbuubU5awFaKUIIh3svrzWLcQ+GGAXN/2MXEXrMWf/pZ8jYMx97PQBd5lU04Ezl JJdr+5nrQQ93mXee+/ZzayLREv9CvA477djVCbZOjc0J2FLcM24BuOuqNR1DYk57L5Rx4u SPcGNFFdY/KvgK5sJ7ZiYlfUAwfJWPKHSVlGSwzXkdQUll80OHDpWjxFgUruyA== From: Thomas Bonnefille Date: Fri, 17 May 2024 11:09:54 +0200 Subject: [PATCH v2 2/3] riscv: dts: thead: Add TH1520 I2C nodes Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240517-i2c-th1520-v2-2-d364d135ccc6@bootlin.com> References: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> In-Reply-To: <20240517-i2c-th1520-v2-0-d364d135ccc6@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jisheng Zhang , Guo Ren , Fu Wei , Drew Fustini , Emil Renner Berthing , Conor Dooley Cc: Palmer Dabbelt , Albert Ou , Paul Walmsley , Thomas Petazzoni , =?utf-8?q?Miqu=C3=A8l_Ray?= =?utf-8?q?nal?= , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Thomas Bonnefille X-Mailer: b4 0.13.0 X-GND-Sasl: thomas.bonnefille@bootlin.com Add nodes for the five I2C on the T-Head TH1520 RISCV SoC. Signed-off-by: Thomas Bonnefille --- arch/riscv/boot/dts/thead/th1520.dtsi | 50 +++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index de7116290ca4..ae6cf4c441cf 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -252,6 +252,36 @@ gpio2: gpio-controller@0 { }; }; + i2c0: i2c@ffe7f20000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xe7f20000 0x0 0x4000>; + interrupts = <44 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@ffe7f24000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xe7f24000 0x0 0x4000>; + interrupts = <45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@ffe7f28000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xe7f28000 0x0 0x4000>; + interrupts = <48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C4>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gpio@ffe7f38000 { compatible = "snps,dw-apb-gpio"; reg = <0xff 0xe7f38000 0x0 0x1000>; @@ -342,6 +372,16 @@ uart2: serial@ffec010000 { status = "disabled"; }; + i2c3: i2c@ffec014000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xec014000 0x0 0x4000>; + interrupts = <47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + dmac0: dma-controller@ffefc00000 { compatible = "snps,axi-dma-1.01a"; reg = <0xff 0xefc00000 0x0 0x1000>; @@ -416,6 +456,16 @@ uart5: serial@fff7f0c000 { status = "disabled"; }; + i2c5: i2c@fff7f2c000 { + compatible = "thead,th1520-i2c", "snps,designware-i2c"; + reg = <0xff 0xf7f2c000 0x0 0x4000>; + interrupts = <49 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk CLK_I2C5>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + timer4: timer@ffffc33000 { compatible = "snps,dw-apb-timer"; reg = <0xff 0xffc33000 0x0 0x14>;