| Message ID | 20220131114726.973690-4-conor.dooley@microchip.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Update the Icicle Kit device tree | expand |
On Mon, Jan 31, 2022 at 03:55:32PM +0000, Conor.Dooley@microchip.com wrote: > On 31/01/2022 15:39, Rob Herring wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > > > On Mon, Jan 31, 2022 at 5:45 AM <conor.dooley@microchip.com> wrote: > >> > >> From: Conor Dooley <conor.dooley@microchip.com> > >> > >> Add device tree bindings for the i2c controller on > >> the Microchip PolarFire SoC. > >> > >> Reviewed-by: Rob Herring <robh@kernel.org> > >> > > > > There should not be a blank line here. > > > > Also, tags should be in chronological order typically. If Daire sent > > this patch out with my tag, then the order is correct. If I gave it on > > a version you sent, then it goes between Daire's and your S-o-b which > > is the case here. > Oh, thanks. Probably been messing this up right/left/centre. > > On another note, I know I'm still missing a RB still on some of the > bindings, but what is the acceptance path for this series? > Any left over bindings not taken by subsystems via yourself and the dts > changes via Palmer's tree? They should go via subsystems. I can take if you want, but not with missing dependencies. I need my tree working. Rob
diff --git a/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml b/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml new file mode 100644 index 000000000000..065ec3d4c95e --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/microchip,mpfs-i2c.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/microchip,mpfs-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip MPFS I2C Controller Device Tree Bindings + +maintainers: + - Daire McNamara <daire.mcnamara@microchip.com> + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - const: microchip,mpfs-i2c # Microchip PolarFire SoC compatible SoCs + - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core + - const: microchip,corei2c-rtl-v7 # Microchip Fabric based i2c IP core + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-frequency: + description: | + Desired I2C bus clock frequency in Hz. As only Standard and Fast + modes are supported, possible values are 100000 and 400000. + enum: [100000, 400000] + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/microchip,mpfs-clock.h> + i2c@2010a000 { + compatible = "microchip,mpfs-i2c", "microchip,corei2c-rtl-v7"; + reg = <0x2010a000 0x1000>; + clocks = <&clkcfg CLK_I2C0>; + interrupt-parent = <&plic>; + interrupts = <58>; + clock-frequency = <100000>; + }; +...