| Message ID | 20210511212052.27242-3-chris.packham@alliedtelesis.co.nz |
|---|---|
| State | New |
| Headers | show |
| Series | P2040/P2041 i2c recovery erratum | expand |
Chris Packham <chris.packham@alliedtelesis.co.nz> writes: > The i2c controllers on the P2040/P2041 have an erratum where the > documented scheme for i2c bus recovery will not work (A-004447). A > different mechanism is needed which is documented in the P2040 Chip > Errata Rev Q (latest available at the time of writing). > > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> > --- > arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) Acked-by: Michael Ellerman <mpe@ellerman.id.au> cheers > diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi > index 872e4485dc3f..ddc018d42252 100644 > --- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi > +++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi > @@ -371,7 +371,23 @@ sdhc@114000 { > }; > > /include/ "qoriq-i2c-0.dtsi" > + i2c@118000 { > + fsl,i2c-erratum-a004447; > + }; > + > + i2c@118100 { > + fsl,i2c-erratum-a004447; > + }; > + > /include/ "qoriq-i2c-1.dtsi" > + i2c@119000 { > + fsl,i2c-erratum-a004447; > + }; > + > + i2c@119100 { > + fsl,i2c-erratum-a004447; > + }; > + > /include/ "qoriq-duart-0.dtsi" > /include/ "qoriq-duart-1.dtsi" > /include/ "qoriq-gpio-0.dtsi" > -- > 2.31.1
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi index 872e4485dc3f..ddc018d42252 100644 --- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi @@ -371,7 +371,23 @@ sdhc@114000 { }; /include/ "qoriq-i2c-0.dtsi" + i2c@118000 { + fsl,i2c-erratum-a004447; + }; + + i2c@118100 { + fsl,i2c-erratum-a004447; + }; + /include/ "qoriq-i2c-1.dtsi" + i2c@119000 { + fsl,i2c-erratum-a004447; + }; + + i2c@119100 { + fsl,i2c-erratum-a004447; + }; + /include/ "qoriq-duart-0.dtsi" /include/ "qoriq-duart-1.dtsi" /include/ "qoriq-gpio-0.dtsi"
The i2c controllers on the P2040/P2041 have an erratum where the documented scheme for i2c bus recovery will not work (A-004447). A different mechanism is needed which is documented in the P2040 Chip Errata Rev Q (latest available at the time of writing). Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)