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Thu, 22 Sep 2022 01:45:56 -0700 Envelope-to: michal.simek@amd.com, radhey.shyam.pandey@amd.com, shubhrajyoti.datta@amd.com, srinivas.goud@amd.com, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Received: from [172.23.64.6] (port=54842 helo=xhdvnc106.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1obHqG-0005Yh-HM; Thu, 22 Sep 2022 01:45:56 -0700 Received: by xhdvnc106.xilinx.com (Postfix, from userid 90444) id 349BF61050; Thu, 22 Sep 2022 14:15:10 +0530 (IST) From: Manikanta Guntupalli To: , , , , CC: , , , Raviteja Narayanam , Manikanta Guntupalli Subject: [PATCH V2 4/9] i2c: xiic: Add wait for FIFO empty in send_tx Date: Thu, 22 Sep 2022 14:14:49 +0530 Message-ID: <1663836294-5698-5-git-send-email-manikanta.guntupalli@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1663836294-5698-1-git-send-email-manikanta.guntupalli@xilinx.com> References: <1663836294-5698-1-git-send-email-manikanta.guntupalli@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1NAM02FT050:EE_|SJ0PR02MB7232:EE_ X-MS-Office365-Filtering-Correlation-Id: 4efbda05-ef01-4860-a43f-08da9c76e785 X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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PTR:unknown-62-198.xilinx.com; CAT:NONE; SFS:(13230022)(4636009)(346002)(39860400002)(396003)(376002)(136003)(451199015)(40470700004)(46966006)(36840700001)(70206006)(47076005)(336012)(356005)(7636003)(4326008)(70586007)(40480700001)(5660300002)(2906002)(44832011)(82740400003)(36756003)(8936002)(40460700003)(36860700001)(478600001)(426003)(82310400005)(26005)(186003)(2616005)(8676002)(6266002)(107886003)(54906003)(41300700001)(6666004)(110136005)(316002)(42186006)(102446001)(2101003); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2022 08:46:12.9153 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4efbda05-ef01-4860-a43f-08da9c76e785 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.62.198]; Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BN1NAM02FT050.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR02MB7232 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Raviteja Narayanam If the tx_half_empty interrupt comes first instead of tx_empty, STOP bit is generated even before all the bytes are transmitted out on the bus. STOP bit should be sent only after all the bytes in the FIFO are transmitted out of the FIFO. So wait until FIFO is empty before sending the STOP bit. Signed-off-by: Raviteja Narayanam Signed-off-by: Manikanta Guntupalli --- drivers/i2c/busses/i2c-xiic.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 10e0fafb25f1..1149104074a7 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -436,6 +436,13 @@ static void xiic_fill_tx_fifo(struct xiic_i2c *i2c) data |= XIIC_TX_DYN_STOP_MASK; } else { u8 cr; + int status; + + /* Wait till FIFO is empty so STOP is sent last */ + status = xiic_wait_tx_empty(i2c); + if (status) + return; + /* Write to CR to stop */ cr = xiic_getreg8(i2c, XIIC_CR_REG_OFFSET); xiic_setreg8(i2c, XIIC_CR_REG_OFFSET, cr &