From patchwork Thu Dec 16 18:48:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 525624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22371C433F5 for ; Thu, 16 Dec 2021 18:49:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240728AbhLPStj (ORCPT ); Thu, 16 Dec 2021 13:49:39 -0500 Received: from inva021.nxp.com ([92.121.34.21]:53550 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236543AbhLPSt2 (ORCPT ); Thu, 16 Dec 2021 13:49:28 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 57A24201A98; Thu, 16 Dec 2021 19:49:27 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4B0252013DE; Thu, 16 Dec 2021 19:49:27 +0100 (CET) Received: from fsr-ub1664-175.ea.freescale.net (fsr-ub1664-175.ea.freescale.net [10.171.82.40]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id C7C95202AD; Thu, 16 Dec 2021 19:49:25 +0100 (CET) From: Abel Vesa To: Rob Herring , Dong Aisheng , Shawn Guo , Sascha Hauer , Greg Kroah-Hartman , Fabio Estevam Cc: Pengutronix Kernel Team , linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org, NXP Linux Team , Linux Kernel Mailing List , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Abel Vesa , Jacky Bai Subject: [RESEND v4 06/10] arm64: dts: freescale: Add ddr subsys dtsi for imx8dxl Date: Thu, 16 Dec 2021 20:48:10 +0200 Message-Id: <1639680494-23183-7-git-send-email-abel.vesa@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1639680494-23183-1-git-send-email-abel.vesa@nxp.com> References: <1639680494-23183-1-git-send-email-abel.vesa@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Jacky Bai Add the ddr subsys dtsi for i.MX8DXL. Additional db pmu is added compared to i.MX8QXP. Signed-off-by: Jacky Bai Signed-off-by: Abel Vesa --- .../boot/dts/freescale/imx8dxl-ss-ddr.dtsi | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi new file mode 100644 index 000000000000..75b482966d94 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021 NXP + */ + +&ddr_subsys { + db_ipg_clk: clock-db-ipg { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <456000000>; + clock-output-names = "db_ipg_clk"; + }; + + db_pmu0: db-pmu@5ca40000 { + compatible = "fsl,imx8dxl-db-pmu"; + reg = <0x5ca40000 0x10000>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&db_pmu0_lpcg IMX_LPCG_CLK_0>, + <&db_pmu0_lpcg IMX_LPCG_CLK_1>; + clock-names = "ipg", "cnt"; + power-domains = <&pd IMX_SC_R_PERF>; + }; + + db_pmu0_lpcg: clock-controller@5cae0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5cae0000 0x10000>; + #clock-cells = <1>; + clocks = <&db_ipg_clk>, <&db_ipg_clk>; + clock-indices = , + ; + clock-output-names = "perf_lpcg_cnt_clk", + "perf_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_PERF>; + }; +};