From patchwork Mon Jul 6 19:24:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 50787 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f69.google.com (mail-la0-f69.google.com [209.85.215.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 10443229FC for ; Mon, 6 Jul 2015 19:28:49 +0000 (UTC) Received: by laar3 with SMTP id r3sf50541299laa.1 for ; Mon, 06 Jul 2015 12:28:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=Bpcf/uAo8jtMq6dTge8sqBcGSBxwD6fwDXlS6F2yGnE=; b=WPBoyxjWO5heqMgFfuibqcmbwFZWv3OyZG42nyzjFiaN2l5niysjPFEtFfNzUG2EgY 2l+kso44yJRxzfi9GzGCgcrAj7HAwigF38wdTVYkptMsbYtrv9Q3WOWTnHvEVDnlSBU/ FoHFMRcTEr0JKcOfhoUhtWesL1jyripZeirpF3AlzpOHulmgXnT+czEMtGoeY56ix32/ ZNc+HAz4NOMDRV+UPDw8YxcY020v6HqSFukPOpIDfm/3CN2wNvDK6fql9a0eY3qHBncS c15KYqMOQFO525r2U25tqQFjbbGcV8OncLo6dQStCrfgrVivjRDf2s3G2plbTDMgWFeG B5gQ== X-Gm-Message-State: ALoCoQmT24Pmwh+gOF6b6i2pxAD7CUNTZ8ohSagv6s2jvfoMzAM1SwKPIl2yoGhRqnCLgwl4HeAj X-Received: by 10.112.142.67 with SMTP id ru3mr213818lbb.1.1436210927992; Mon, 06 Jul 2015 12:28:47 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.2.202 with SMTP id 10ls794404law.79.gmail; Mon, 06 Jul 2015 12:28:47 -0700 (PDT) X-Received: by 10.112.161.197 with SMTP id xu5mr399274lbb.69.1436210927779; Mon, 06 Jul 2015 12:28:47 -0700 (PDT) Received: from mail-la0-f52.google.com (mail-la0-f52.google.com. [209.85.215.52]) by mx.google.com with ESMTPS id pt2si16050829lbb.46.2015.07.06.12.28.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Jul 2015 12:28:47 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) client-ip=209.85.215.52; Received: by lagc2 with SMTP id c2so166994797lag.3 for ; Mon, 06 Jul 2015 12:28:47 -0700 (PDT) X-Received: by 10.112.166.2 with SMTP id zc2mr412328lbb.29.1436210927595; Mon, 06 Jul 2015 12:28:47 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp1921483lbb; Mon, 6 Jul 2015 12:28:46 -0700 (PDT) X-Received: by 10.68.204.133 with SMTP id ky5mr798463pbc.67.1436210919813; Mon, 06 Jul 2015 12:28:39 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k16si30478462pdm.244.2015.07.06.12.28.38; Mon, 06 Jul 2015 12:28:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755482AbbGFT2a (ORCPT + 29 others); Mon, 6 Jul 2015 15:28:30 -0400 Received: from mail-pd0-f173.google.com ([209.85.192.173]:35142 "EHLO mail-pd0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755342AbbGFT2Y (ORCPT ); Mon, 6 Jul 2015 15:28:24 -0400 Received: by pdbci14 with SMTP id ci14so110934412pdb.2 for ; Mon, 06 Jul 2015 12:28:24 -0700 (PDT) X-Received: by 10.68.102.228 with SMTP id fr4mr871355pbb.110.1436210904131; Mon, 06 Jul 2015 12:28:24 -0700 (PDT) Received: from localhost.localdomain ([202.62.77.106]) by mx.google.com with ESMTPSA id x7sm19293964pas.28.2015.07.06.12.28.19 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 06 Jul 2015 12:28:23 -0700 (PDT) From: Vaibhav Hiremath To: linux-i2c@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, wsa@the-dreams.de, robert.jarzmik@free.fr, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, Vaibhav Hiremath , "Jett.Zhou" , Yi Zhang Subject: [PATCH-v3 10/11] i2c: pxa: Add ILCR (tLow & tHigh) configuration support Date: Tue, 7 Jul 2015 00:54:54 +0530 Message-Id: <1436210695-19159-11-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436210695-19159-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1436210695-19159-1-git-send-email-vaibhav.hiremath@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: vaibhav.hiremath@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , With addition of PXA910 family of devices, the TWSI module supports SCL clock adjustment using ILCR register. This patch enables the control and configuration of ICLR through DT properties, i2c-sclk-high-time-ns: SCLK high time (tHigh), for standard/fast/high speed mode i2c-sclk-low-time-ns: SCLK low time (tLow), for standard/fast/high speed mode Note that in case of standard and fast mod, the tLow and tHigh counters are same, and software will use tLow value. Also, brought up devm_clk_get() fn above i2c_pxa_probe_dt(), as it uses clk rate for timing calculations. Signed-off-by: Vaibhav Hiremath Signed-off-by: Jett.Zhou Signed-off-by: Yi Zhang --- drivers/i2c/busses/i2c-pxa.c | 68 +++++++++++++++++++++++++++++++++++++++----- 1 file changed, 61 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index d5cf6f5..537555a 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -195,6 +195,9 @@ struct pxa_i2c { unsigned long rate; bool highmode_enter; bool disable_after_xfer; + + unsigned int sclk_thigh_load_cnt; + unsigned int sclk_tlow_load_cnt; }; #define _IBMR(i2c) ((i2c)->reg_ibmr) @@ -507,6 +510,33 @@ static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode) #define i2c_pxa_set_slave(i2c, err) do { } while (0) #endif +static void i2c_pxa_do_sclk_adj(struct pxa_i2c *i2c) +{ + unsigned int reg_ilcr; + + reg_ilcr = readl(_ILCR(i2c)); + + /* For standard/fast mode tlow and thigh counters are same */ + if (i2c->sclk_tlow_load_cnt) { + unsigned int mask, shift; + + mask = i2c->high_mode ? ILCR_HLVL_MASK : + i2c->fast_mode ? ILCR_FLV_MASK : ILCR_SLV_MASK; + shift = i2c->high_mode ? ILCR_HLVL_SHIFT : + i2c->fast_mode ? ILCR_FLV_SHIFT : ILCR_SLV_SHIFT; + + reg_ilcr &= ~mask; + reg_ilcr |= i2c->sclk_tlow_load_cnt << shift; + } + + if (i2c->high_mode && i2c->sclk_thigh_load_cnt) { + reg_ilcr &= ~ILCR_HLVH_MASK; + reg_ilcr |= i2c->sclk_thigh_load_cnt << ILCR_HLVH_SHIFT; + } + + writel(reg_ilcr, _ILCR(i2c)); +} + static void i2c_pxa_reset(struct pxa_i2c *i2c) { pr_debug("Resetting I2C Controller Unit\n"); @@ -526,6 +556,8 @@ static void i2c_pxa_reset(struct pxa_i2c *i2c) writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c)); writel(readl(_ICR(i2c)) | (i2c->high_mode ? ICR_HS : 0), _ICR(i2c)); + i2c_pxa_do_sclk_adj(i2c); + #ifdef CONFIG_I2C_PXA_SLAVE dev_info(&i2c->adap.dev, "Enabling slave mode\n"); writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c)); @@ -1198,6 +1230,26 @@ static int i2c_pxa_probe_dt(struct platform_device *pdev, struct pxa_i2c *i2c, *i2c_types = (long)(of_id->data); + /* optional properties */ + if (of_device_is_compatible(np, "mrvl,mmp-twsi")) { + unsigned int tlow = 0, thigh = 0; + unsigned int clk_ns; + + /* clock time in nsec */ + clk_ns = 1000000 / (i2c->rate / 1000); + + of_property_read_u32(np, "i2c-sclk-high-time-ns", &thigh); + i2c->sclk_thigh_load_cnt = thigh / clk_ns; + + of_property_read_u32(np, "i2c-sclk-low-time-ns", &tlow); + i2c->sclk_tlow_load_cnt = tlow / clk_ns; + + /* For std/fast mode tlow & thigh have same bit-fields */ + if (!i2c->high_mode && + (i2c->sclk_tlow_load_cnt != i2c->sclk_thigh_load_cnt)) + dev_warn(&i2c->adap.dev, + "mismatch of tLow & tHigh values, using tLow\n"); + } return 0; } @@ -1247,6 +1299,15 @@ static int i2c_pxa_probe(struct platform_device *dev) return irq; } + i2c->clk = devm_clk_get(&dev->dev, NULL); + if (IS_ERR(i2c->clk)) { + dev_err(&dev->dev, "failed to get the clk: %ld\n", + PTR_ERR(i2c->clk)); + return PTR_ERR(i2c->clk); + } + + i2c->rate = clk_get_rate(i2c->clk); + /* Default adapter num to device id; i2c_pxa_probe_dt can override. */ i2c->adap.nr = dev->id; @@ -1264,13 +1325,6 @@ static int i2c_pxa_probe(struct platform_device *dev) strlcpy(i2c->adap.name, "pxa_i2c-i2c", sizeof(i2c->adap.name)); - i2c->clk = devm_clk_get(&dev->dev, NULL); - if (IS_ERR(i2c->clk)) { - dev_err(&dev->dev, "failed to get the clk: %ld\n", - PTR_ERR(i2c->clk)); - return PTR_ERR(i2c->clk); - } - i2c->reg_base = devm_ioremap_resource(&dev->dev, res); if (IS_ERR(i2c->reg_base)) { dev_err(&dev->dev, "failed to map resource: %ld\n",