| Message ID | 20240109125814.3691033-1-tudor.ambarus@linaro.org |
|---|---|
| Headers | show |
| Series | GS101 Oriole: CMU_PERIC0 support and USI updates | expand |
On 09/01/2024 13:58, Tudor Ambarus wrote: > Add google,gs101-hsi2c dedicated compatible for representing > I2C of Google GS101 SoC. > > Acked-by: Wolfram Sang <wsa@kernel.org> OK, I will take it but in general this should not go via SoC tree, but I2C. GS101 was already merged, so please send all your future submissions regular way. Best regards, Krzysztof
On 09/01/2024 13:58, Tudor Ambarus wrote: > GS101's Connectivity Peripheral blocks (peric0/1 blocks) which > include the I3C and USI (I2C, SPI, UART) only allow 32-bit > register accesses. > > Instead of specifying the reg-io-width = 4 everywhere, for each node, > the requirement should be deduced from the compatible. > > Infer UPIO_MEM32 iotype from the "google,gs101-uart" compatible. > Update the uart info name to be GS101 specific in order to > differentiate from the other exynos platforms. All the other settings > are not changed. > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
This patch set shall be queued after the cmu_misc clock name fixes from: https://lore.kernel.org/linux-arm-kernel/20240109114908.3623645-1-tudor.ambarus@linaro.org/ Add support for PERIC0 clocks. Use them for USI in serial and I2C configurations. Tested the serial at different baudrates (115200, 1M, 3M) and the I2C with an at24 eeprom, all went fine. Apart of the DT and defconfig changes, the patch set spans through the tty and clk subsystems. The expectation is that Krzysztof will apply the whole series through the Samsung SoC tree. If the tty and clk subsystem maintainers can give an acked-by or reviewed-by on the relevant patches that would be most appreciated! Thanks! ta Changes in v3: - rename cmu_peric0 clocks to just "bus" and "ip" and then comply with the change in device tree and clock driver - reposition ``iotype`` of ``struct s3c24xx_uart_info`` to reduce the memory footprint of the struct. A patch set reworking the members of the struct will follow. - fix the usi8 clocks order in the device tree - collect Peter's R-b tags - changes log in each patch set as well, in the comments section under ```---``` Changes in v2: - gs101 serial - infer the reg-io-width from the compatible as the entire PERIC block allows just 32-bit register accesses. - identify the critical clocks faaaaaaarom PERIC0 and mark them accordingly (if disabled theslocks hang the system even if their parents are still enabled). - update dtsi and use USI's gate clocks instead of the dividers clocks - move hsi2c_8 cells and pinctrls into dtsi - address Sam's cosmetic changes in the device tree files - drop defconfig patches (savedefconfig output & at24 eeprom enablement) - collect Acked-by and Reviewed-by tags - changes log in each patch as well, in the comments section under ```---``` Tudor Ambarus (12): dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit dt-bindings: i2c: exynos5: add google,gs101-hsi2c compatible dt-bindings: serial: samsung: do not allow reg-io-width for gs101 tty: serial: samsung: prepare for different IO types tty: serial: samsung: set UPIO_MEM32 iotype for gs101 tty: serial: samsung: add gs101 earlycon support clk: samsung: gs101: add support for cmu_peric0 arm64: dts: exynos: gs101: remove reg-io-width from serial arm64: dts: exynos: gs101: enable cmu-peric0 clock controller arm64: dts: exynos: gs101: update USI UART to use peric0 clocks arm64: dts: exynos: gs101: define USI8 with I2C configuration arm64: dts: exynos: gs101: enable eeprom on gs101-oriole .../bindings/clock/google,gs101-clock.yaml | 25 +- .../devicetree/bindings/i2c/i2c-exynos5.yaml | 1 + .../bindings/serial/samsung_uart.yaml | 2 + .../boot/dts/exynos/google/gs101-oriole.dts | 14 + arch/arm64/boot/dts/exynos/google/gs101.dtsi | 54 +- drivers/clk/samsung/clk-gs101.c | 583 ++++++++++++++++++ drivers/tty/serial/samsung_tty.c | 58 +- include/dt-bindings/clock/google,gs101.h | 81 +++ 8 files changed, 794 insertions(+), 24 deletions(-)