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[20/50] pinctrl: renesas: r8a779a0: Use shorthands for reserved fields

Message ID 807b2a7e02be2fac50c280961a4841813ab13cd8.1649865241.git.geert+renesas@glider.be
State Accepted
Commit 599e16c1478dc6d08c0eef00e109e5b5c2315864
Headers show
Series pinctrl: renesas: Reserved field optimizations | expand

Commit Message

Geert Uytterhoeven April 13, 2022, 5:23 p.m. UTC 
Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 140 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/renesas/pfc-r8a779a0.c | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)
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Patch

diff --git a/drivers/pinctrl/renesas/pfc-r8a779a0.c b/drivers/pinctrl/renesas/pfc-r8a779a0.c
index 4a668a04b7ca6820..081a14fbe5a4af87 100644
--- a/drivers/pinctrl/renesas/pfc-r8a779a0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779a0.c
@@ -3656,16 +3656,9 @@  static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 #define F_(x, y)	x,
 #define FM(x)		FN_##x,
 	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6050900, 32,
-			     GROUP(4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1),
+			     GROUP(-16, 2, 2, 2, 2, 2, 2, 2, -2),
 			     GROUP(
-		/* RESERVED 31, 30, 29, 28 */
-		0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0,
-		/* RESERVED 27, 26, 25, 24 */
-		0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0,
-		/* RESERVED 23, 22, 21, 20 */
-		0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0,
-		/* RESERVED 19, 18, 17, 16 */
-		0, 0, 0, 0, 0, 0, 0, 0,	0, 0, 0, 0, 0, 0, 0, 0,
+		/* RESERVED 31-16 */
 		MOD_SEL2_15_14
 		MOD_SEL2_13_12
 		MOD_SEL2_11_10
@@ -3673,8 +3666,7 @@  static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 		MOD_SEL2_7_6
 		MOD_SEL2_5_4
 		MOD_SEL2_3_2
-		0, 0,
-		0, 0, ))
+		/* RESERVED 1-0 */ ))
 	},
 	{ },
 };