| Message ID | 5e1b119a51df19ead32561e87ce2ee1441b67154.1610364681.git.baruch@tkos.co.il |
|---|---|
| State | Accepted |
| Commit | ea6fe47f3ed4f89f9216e98f1344c06d6516cb28 |
| Headers | show |
| Series | gpio: mvebu: Armada 8K/7K PWM support | expand |
Hi Baruch, this caught my eye: On Mon, Jan 11, 2021 at 12:47 PM Baruch Siach <baruch@tkos.co.il> wrote: > Update the example as well. Add the '#pwm-cells' and 'clocks' properties > for a complete working example. > > Reviewed-by: Rob Herring <robh@kernel.org> > Signed-off-by: Baruch Siach <baruch@tkos.co.il> (...) > +Optional properties: > + > +- marvell,pwm-offset: offset address of PWM duration control registers inside > + the syscon block (...) > ap_syscon: system-controller@6f4000 { > compatible = "syscon", "simple-mfd"; > @@ -101,6 +106,9 @@ ap_syscon: system-controller@6f4000 { > gpio-controller; > #gpio-cells = <2>; > gpio-ranges = <&ap_pinctrl 0 0 19>; > + marvell,pwm-offset = <0x10c0>; This seems to be one of those cases where we start to encode things related to the hardware variant into the device tree. Is this just documenting ABI that was introduced in the past and we can not do anything about now? In that case it is OK I suppose. For a new binding we would certainly require that the system controller provide a specific tertiary compatible string for this, lest we disguise the not-so-simple system controller as "simple-mfd" so: compatible = "syscon", "simple-mfd", "my-silicon-id"; Then detect the PWM offset by using if(of_device_is_compatibe(np, "my-silicon-id")) in the code rather than parsing any marvell,pwm-offset property. Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt index e31511255d8e..052a967c1f28 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt @@ -80,6 +80,11 @@ Required properties: - offset: offset address inside the syscon block +Optional properties: + +- marvell,pwm-offset: offset address of PWM duration control registers inside + the syscon block + Example: ap_syscon: system-controller@6f4000 { compatible = "syscon", "simple-mfd"; @@ -101,6 +106,9 @@ ap_syscon: system-controller@6f4000 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&ap_pinctrl 0 0 19>; + marvell,pwm-offset = <0x10c0>; + #pwm-cells = <2>; + clocks = <&ap_clk 3>; }; };