From patchwork Sat Feb 24 10:44:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 129508 Delivered-To: patch@linaro.org Received: by 10.46.66.2 with SMTP id p2csp1573019lja; Sat, 24 Feb 2018 02:45:00 -0800 (PST) X-Google-Smtp-Source: AH8x2252vF4fkQqgvzwwNGKIWoMnyGe4YCLuzU9B9DoZ/24ANGYg6v8zZmpWk3UBAJ00H/AxpKeg X-Received: by 2002:a17:902:6b4c:: with SMTP id g12-v6mr4480690plt.363.1519469100072; Sat, 24 Feb 2018 02:45:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519469100; cv=none; d=google.com; s=arc-20160816; b=iC7/BG17U0AxrPqN0WYg1/l7aLyK2v+eHFFGdHsJMTDyOeO1pip6C8PRFmILrTul8y Pk5+BBEIOwnyb+8lRt1VG7P1nBAjtyncTnUBC19/x+Zre39vG49d4BQ00HPM+9s4B1gL /yxLhB3E6S9AmD/K27vvlsJjRiTxpWxwQ7S/kKbeWGTJFx3q5WGBytinhKvIRhhjQWMM l9V/vSR7S3kYELlPVkS32djcb2w2YxViF3VNPWvlmW8EOs0zL8UTJnclkc5Q95juDIYf XjPO+JuQVTBo3osA6l0VjlxfJaEYybGBNKzsjLhXLivSWM1cIhLEg7aVHyMB6UOMXIxI ueLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=rXOUhXjKnR6FvQ11IeosxlCnqdwSIU2hCF2AO29Lfzg=; b=DBzgkPcz1y4BgQRMIfEHzlP2uXd/2gL47+k++1O8W2dZOaph8BKtjljlacNxOqQOKX OcCo7WxOVNuhR7sqz+aP7xMKfum2BINCN5geH3JMUy7wgaKZCsHARQqs+EgK/a6J2vUc QOXXR8l6rL9QdD0L2m8DkcnZM3b1MIbSYN8RDnqcT85QHSdAniUKE0sUAXasdcn+YrTk cXJ/25S4ScLAi1Sk5yu9tRw0dsfwlzGkKWWjE/rlp7XirLIG6uLPj2eUkooB3mjyegoe p1AGb4gVcHpu5nBplsvppDTowithm3HhzNuIPgCvVuzhCMl5TS7zx4G0zHtNy5QlyJYJ WoIw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LDF1RPls; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 61-v6si3375850plz.417.2018.02.24.02.44.59; Sat, 24 Feb 2018 02:45:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LDF1RPls; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751296AbeBXKo6 (ORCPT + 5 others); Sat, 24 Feb 2018 05:44:58 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:40096 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751165AbeBXKo5 (ORCPT ); Sat, 24 Feb 2018 05:44:57 -0500 Received: by mail-pl0-f67.google.com with SMTP id i6so6429510plt.7 for ; Sat, 24 Feb 2018 02:44:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=jNR0wgYqd068XgMU8Ss5u1NUJ7esEfeWWSYTku5GtRE=; b=LDF1RPlsh4Ab4I94ZvH3pOG/yx4EpaE+LcYnxxDej3w2EyVWbvPz/boDsSpz72ba9o XtmPv92GlHDKcAe1FjPoTONJbNOSYZs+woWM6A5SGep9UD2QY5nJaqLqUymJ7agMsPFT fPUKrIxdEUgo5cGeSD/jR+ZXBL+cTzXKM6nnQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=jNR0wgYqd068XgMU8Ss5u1NUJ7esEfeWWSYTku5GtRE=; b=I7LZrFmNYg0bgBc77OMrSjvrzOw5j8hoQZqX2PxXx5f6hfPW7FJKaRk5rFuGh7HiaV Me2BT8mMgThheZwhumV8UrKRxvEO22AW+soHjzOtcliMDlx/WuSyNag6kleJL0oCyxi2 RH8C0LB0rdQ2yiC+lJ7GADilTo69nks8+EOv5CnR4ikvrp7opbrtDbqlY4u4j6t2dYxb hnUdA0GecO9xQOuM4f+R2Ii1EdzNwE0zzsiWDrIPo9pOqNUfFlCi4aqNp1mT0vMXoreJ HWGDSDAC8cMl7+TNCB0c1VcsP/KvVFBxdkdkjer1mUuZoLO+0HB9lgh2zG9lcTvIofob izYQ== X-Gm-Message-State: APf1xPC4eLW+ffdSmWcR7IuFRUdJo7VV5qY7hJ9agVsWMjgpJQ4E1jUP zhUYcYr0j1Lc5t5cvxCZeY+Fmw== X-Received: by 2002:a17:902:5322:: with SMTP id b31-v6mr4471169pli.61.1519469096501; Sat, 24 Feb 2018 02:44:56 -0800 (PST) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id m3sm7897710pgs.90.2018.02.24.02.44.52 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 24 Feb 2018 02:44:55 -0800 (PST) From: Baolin Wang To: linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, broonie@kernel.org, baolin.wang@linaro.org, andy.shevchenko@gmail.com Subject: [PATCH v2 1/3] dt-bindings: gpio: Add Spreadtrum EIC controller documentation Date: Sat, 24 Feb 2018 18:44:18 +0800 Message-Id: <334505d3a13a73ad347427b408ed581832434289.1519468782.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This patch adds the device tree bindings for the Spreadtrum EIC controller. The EIC can be seen as a special type of GPIO, which can only be used as input mode. Signed-off-by: Baolin Wang --- Changes since v1: - Fix some typos and grammar issues. - Add more explanation to make things clear. - List all device nodes as examples. --- .../devicetree/bindings/gpio/gpio-eic-sprd.txt | 97 ++++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt new file mode 100644 index 0000000..93d98d0 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt @@ -0,0 +1,97 @@ +Spreadtrum EIC controller bindings + +The EIC is the abbreviation of external interrupt controller, which can +be used only in input mode. The Spreadtrum platform has 2 EIC controllers, +one is in digital chip, and another one is in PMIC. The digital chip EIC +controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and +EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- +module. + +The EIC-debounce sub-module provides up to 8 source input signal +connections. A debounce mechanism is used to capture the input signals' +stable status (millisecond resolution) and a single-trigger mechanism +is introduced into this sub-module to enhance the input event detection +reliability. In addition, this sub-module's clock can be shut off +automatically to reduce power dissipation. Moreover the debounce range +is from 1ms to 4s with a step size of 1ms. The input signal will be +ignored if it is asserted for less than 1 ms. + +The EIC-latch sub-module is used to latch some special power down signals +and generate interrupts, since the EIC-latch does not depend on the APB +clock to capture signals. + +The EIC-async sub-module uses a 32kHz clock to capture the short signals +(microsecond resolution) to generate interrupts by level or edge trigger. + +The EIC-sync is similar with GPIO's input function, which is a synchronized +signal input register. It can generate interrupts by level or edge trigger +when detecting input signals. + +Required properties: +- compatible: Should be one of the following: + "sprd,sc9860-eic-debounce", + "sprd,sc9860-eic-latch", + "sprd,sc9860-eic-async", + "sprd,sc9860-eic-sync", + "sprd,sc27xx-eic". +- reg: Define the base and range of the I/O address space containing + the GPIO controller registers. +- gpio-controller: Marks the device node as a GPIO controller. +- #gpio-cells: Should be <2>. The first cell is the gpio number and + the second cell is used to specify optional parameters. +- interrupt-controller: Marks the device node as an interrupt controller. +- #interrupt-cells: Should be <2>. Specifies the number of cells needed + to encode interrupt source. +- interrupts: Should be the port interrupt shared by all the gpios. + +Example: + eic_debounce: gpio@40210000 { + compatible = "sprd,sc9860-eic-debounce"; + reg = <0 0x40210000 0 0x80>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + eic_latch: gpio@40210080 { + compatible = "sprd,sc9860-eic-latch"; + reg = <0 0x40210080 0 0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + eic_async: gpio@402100a0 { + compatible = "sprd,sc9860-eic-async"; + reg = <0 0x402100a0 0 0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + eic_sync: gpio@402100c0 { + compatible = "sprd,sc9860-eic-sync"; + reg = <0 0x402100c0 0 0x20>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + + pmic_eic: gpio@300 { + compatible = "sprd,sc27xx-eic"; + reg = <0x300>; + interrupt-parent = <&sc2731_pmic>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + };