From patchwork Fri Oct 18 13:19:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 836865 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AA41D1E49F; Fri, 18 Oct 2024 13:19:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729257585; cv=none; b=VvfmJ9JxVC/GGuhBlxjsJI7XCE4dZruhRMtg3ikBMiVrIuLCbMlM19QpnmUL4hHlcgchjLb1DKIVqTjCcVjBJZiQiM7CLFhEBf+Ln5QB1NUYIrS3zGNq/oRRO2lCiadTYEynXcm49RCOLT4DM4EupFFSPBgqpQJhc+ShwA1F1pg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729257585; c=relaxed/simple; bh=zrSswidO56FtbeNZMQXSi7aPMw7zkb3G9ZpSYil9sWg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XJLzX5YPh8pKijocrCsuaBhigNCb6agcgkhhfjgyp8/drk8yNhBMNey7K1Ug6w5Kz3PybkU5ZgQOUqf4HyVxmNTnvZxaYbC/OgHBzKAbupISOQL8YIXgkpUKgY06149H3QuetNCDgSLRp3Y0BxY8SMIZclU0sZPDOZRuyFb4/wU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cVwEx1dz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cVwEx1dz" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3927C4CEC3; Fri, 18 Oct 2024 13:19:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1729257585; bh=zrSswidO56FtbeNZMQXSi7aPMw7zkb3G9ZpSYil9sWg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=cVwEx1dzwq0/4S+QwX1asXIQjHRbpsThO945b7eYKqXudCoRw8boZLYRx/u9EU3Pi LaDxry7jk+HANB9efMEUKphic8FVt05Eej3wNEi0GIM4+2feIO1JX344ybEH7uE5Gj XJ75fb2uR6Cf3IZ887nc5kxqg15/0rvuzbANw6GPDB5Ciw3urh9B6PXbqtdSVbNYYP QwYyxnm/xOQ2gENzonsYwn5u5fWC57k3FxWXWtQMZLzOWpCmARn7GXuPERN9sWj5Ca 5q4E/Tdbv+IqdoCNLzO2wGhibNgeEn8tC1vJSsaxJ6LERwfZeIrvYubTNwh3jYMk9r BVkY3AtUF4ZZA== From: Lorenzo Bianconi Date: Fri, 18 Oct 2024 15:19:05 +0200 Subject: [PATCH v8 4/6] dt-bindings: mfd: Add support for Airoha EN7581 GPIO System Controller Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241018-en7581-pinctrl-v8-4-b676b966a1d1@kernel.org> References: <20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org> In-Reply-To: <20241018-en7581-pinctrl-v8-0-b676b966a1d1@kernel.org> To: Lorenzo Bianconi , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sean Wang , Matthias Brugger , AngeloGioacchino Del Regno , Lee Jones , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= Cc: linux-mediatek@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, upstream@airoha.com, benjamin.larsson@genexis.eu, ansuelsmth@gmail.com, linux-pwm@vger.kernel.org X-Mailer: b4 0.14.2 From: Christian Marangi Add support for Airoha EN7581 GPIO System Controller which provide a register map for controlling the GPIO, pinctrl and PWM of the SoC via dedicated pinctrl and pwm child nodes. Signed-off-by: Christian Marangi Reviewed-by: Linus Walleij Reviewed-by: Rob Herring (Arm) Reviewed-by: AngeloGioacchino Del Regno Co-developed-by: Lorenzo Bianconi Signed-off-by: Lorenzo Bianconi --- .../bindings/mfd/airoha,en7581-gpio-sysctl.yaml | 90 ++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml new file mode 100644 index 0000000000000000000000000000000000000000..4a81ed82ef34dc2b99594098584cc77f67f276c8 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/airoha,en7581-gpio-sysctl.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha EN7581 GPIO System Controller + +maintainers: + - Christian Marangi + - Lorenzo Bianconi + +description: + Airoha EN7581 SoC GPIO system controller which provided a register map + for controlling the GPIO, pins and PWM of the SoC. + +properties: + compatible: + items: + - const: airoha,en7581-gpio-sysctl + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + pinctrl: + type: object + $ref: /schemas/pinctrl/airoha,en7581-pinctrl.yaml + description: + Child node definition for EN7581 Pin controller + + pwm: + type: object + $ref: /schemas/pwm/airoha,en7581-pwm.yaml + description: + Child node definition for EN7581 PWM controller + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + system-controller@1fbf0200 { + compatible = "airoha,en7581-gpio-sysctl", "syscon", "simple-mfd"; + reg = <0x1fbf0200 0xc0>; + + pinctrl { + compatible = "airoha,en7581-pinctrl"; + + interrupt-parent = <&gic>; + interrupts = ; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + mmc-pins { + mux { + function = "emmc"; + groups = "emmc"; + }; + }; + + mdio-pins { + mux { + function = "mdio"; + groups = "mdio"; + }; + + conf { + pins = "gpio2"; + output-enable; + }; + }; + }; + + pwm { + compatible = "airoha,en7581-pwm"; + + #pwm-cells = <3>; + }; + };