From patchwork Tue Jul 9 09:23:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikandan Muralidharan X-Patchwork-Id: 811596 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DC4115572E; Tue, 9 Jul 2024 09:24:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720517076; cv=none; b=VkbfZd+0JhlpRUp34SYGBRchI1ha3Aego+SEEvr0wyCtOG1J4ex40D8p51OBqt1phzrUV8AGmPEUh0Edzh3DqvZTJ/M52Hka8lHLI5HfNi2Wk4KyG0BdLUq00rELPhYOiRKkfBnX+XxCfQzBmgSPDsb82zcbkSUZg4kWQXx83Ns= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1720517076; c=relaxed/simple; bh=MFc07a7qDFLWvBfKP3p3SXSxGEayoTWHYZRN+ciE6XE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SztOiFnURpuH+NiqThMqQ2TM1ePMJTCZNQTL/fhvK4gQQmz4plfq3z9czg/k3PVgpryid7jib2/PpVZr+luOCMd/qo34tSkJmKv4R/TiIWYda8XRZC5bvUvZC4pxI+dubrOMkWBsN8G4tEQztmGrXACrK9a0WvLyZ97qTDtPH+k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=m9iIWWCc; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="m9iIWWCc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1720517074; x=1752053074; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MFc07a7qDFLWvBfKP3p3SXSxGEayoTWHYZRN+ciE6XE=; b=m9iIWWCccGSHFDMwABB9ldqER88zc+hYdepKEhJwLVb2nUSF3yQWd0Y0 4C3M6cftJnb0yDz2EKWdXyaxNmLS0RDqIi5GNQMdq7lE46aq1i/+sGjRf 7cyugn87zZoDC1eY/v93t6QlSffZPxLhtUKDyqgkSGU5cSL8ThtLSL4vk NDXU2SnP0woNqJ1yH+zIrqTfcxV+h18QwosbV0AU76Ar9AHBZROH7ShBO R8WKFeuqselKLc7mSv/W/oI46d7v40EUZYYq1YaSUIJvDH2r8UYSbRzvu bfQw3ujrkBRysrBTgdqpIZoxrxXUOt5aMffYX1mS0ER4Jt/QV+UvRaVU+ Q==; X-CSE-ConnectionGUID: xQeYMFNNSJOpfPWTFyqi0w== X-CSE-MsgGUID: UEzv8kY8Suu5Nv7GWUuTPg== X-IronPort-AV: E=Sophos;i="6.09,194,1716274800"; d="scan'208";a="31649753" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 09 Jul 2024 02:24:28 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Tue, 9 Jul 2024 02:24:18 -0700 Received: from che-lt-i67131.microchip.com (10.10.85.11) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Tue, 9 Jul 2024 02:24:12 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , CC: Subject: [PATCH v3 2/5] ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes Date: Tue, 9 Jul 2024 14:53:51 +0530 Message-ID: <20240709092354.191643-3-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240709092354.191643-1-manikandan.m@microchip.com> References: <20240709092354.191643-1-manikandan.m@microchip.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The driver data specific to each pinctrl GPIO bank compatible nodes are not the same and declaring additional compatible string as fallback has no specific purpose, hence, removing the additional compatible string from the pinctrl nodes in DT to comply with atmel,at91-pinctrl.txt documentation. Signed-off-by: Manikandan Muralidharan Acked-by: Linus Walleij --- arch/arm/boot/dts/microchip/at91sam9n12.dtsi | 2 +- arch/arm/boot/dts/microchip/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/microchip/sam9x60.dtsi | 2 +- arch/arm/boot/dts/microchip/sama5d3.dtsi | 2 +- arch/arm/boot/dts/microchip/sama5d4.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi index 9aa22195051d..844bd50943fc 100644 --- a/arch/arm/boot/dts/microchip/at91sam9n12.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9n12.dtsi @@ -226,7 +226,7 @@ dma: dma-controller@ffffec00 { pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; - compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd"; + compatible = "atmel,at91sam9x5-pinctrl", "simple-mfd"; ranges = <0xfffff400 0xfffff400 0x800>; atmel,mux-mask = < diff --git a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi index d41d7c844200..27c1f2861cc3 100644 --- a/arch/arm/boot/dts/microchip/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/microchip/at91sam9x5.dtsi @@ -202,7 +202,7 @@ dma1: dma-controller@ffffee00 { pinctrl: pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; - compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd"; + compatible = "atmel,at91sam9x5-pinctrl", "simple-mfd"; ranges = <0xfffff400 0xfffff400 0x800>; /* shared pinctrl settings */ diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index 4e71ae63edf1..797855e78058 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -1223,7 +1223,7 @@ AT91_XDMAC_DT_PERID(28))>, pinctrl: pinctrl@fffff400 { #address-cells = <1>; #size-cells = <1>; - compatible = "microchip,sam9x60-pinctrl", "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-mfd"; + compatible = "microchip,sam9x60-pinctrl", "simple-mfd"; ranges = <0xfffff400 0xfffff400 0x800>; /* mux-mask corresponding to sam9x60 SoC in TFBGA228L package */ diff --git a/arch/arm/boot/dts/microchip/sama5d3.dtsi b/arch/arm/boot/dts/microchip/sama5d3.dtsi index f1614dcd7d28..39865133aa56 100644 --- a/arch/arm/boot/dts/microchip/sama5d3.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d3.dtsi @@ -493,7 +493,7 @@ aic: interrupt-controller@fffff000 { pinctrl: pinctrl@fffff200 { #address-cells = <1>; #size-cells = <1>; - compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-mfd"; + compatible = "atmel,sama5d3-pinctrl", "simple-mfd"; ranges = <0xfffff200 0xfffff200 0xa00>; atmel,mux-mask = < /* A B C */ diff --git a/arch/arm/boot/dts/microchip/sama5d4.dtsi b/arch/arm/boot/dts/microchip/sama5d4.dtsi index 69dd4e7b4c14..b253ba33fc38 100644 --- a/arch/arm/boot/dts/microchip/sama5d4.dtsi +++ b/arch/arm/boot/dts/microchip/sama5d4.dtsi @@ -791,7 +791,7 @@ dbgu: serial@fc069000 { pinctrl: pinctrl@fc06a000 { #address-cells = <1>; #size-cells = <1>; - compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-mfd"; + compatible = "atmel,sama5d3-pinctrl", "simple-mfd"; ranges = <0xfc068000 0xfc068000 0x100 0xfc06a000 0xfc06a000 0x4000>; /* WARNING: revisit as pin spec has changed */