From patchwork Tue Jun 25 20:03:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Barker X-Patchwork-Id: 808413 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2B41217E451; Tue, 25 Jun 2024 20:04:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719345857; cv=none; b=JuCHS/cKSJHpEnuxhtMq7rdRsfwzoyqGH7LlvJn0HtBZlDSd8ktP1zmTwk8I4WY94XwNFkVFazncPqOvMeVMuVA1+1/kLXXmEvRoKPzvgTGCN6XWhGVZi0g5Pt7D9ufghbq79cMB0bT3nhAfW/ZZXCfbodNHCNEnSLG/VMN6CgI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719345857; c=relaxed/simple; bh=+Eb/FCHx6HNPOulvBM4lYjiuUFxkpho+JK7wwDQc/ZU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MsFMtSN81p1HY1mQH2JoHkE4I6oJahmKPkay0xUBqGjnG6nuGUjAdlPYP5Wnx+YG7z57oMFKbbgSkzyI7LK968y7Z7lzh9UzbVksP4dQWNSTIgguOUxPxVvlqOjZu0vyD4nQgPP5br5PhL7dnfEBvWfnafwZrKhfynvIwCKcr3Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com; spf=pass smtp.mailfrom=bp.renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=bp.renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bp.renesas.com X-IronPort-AV: E=Sophos;i="6.08,264,1712588400"; d="scan'208";a="213220656" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 26 Jun 2024 05:04:14 +0900 Received: from renesas-deb12.mshome.net (unknown [10.226.92.125]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 27A8C400C4E6; Wed, 26 Jun 2024 05:04:09 +0900 (JST) From: Paul Barker To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Lad Prabhakar Cc: Paul Barker , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 9/9] arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V Date: Tue, 25 Jun 2024 21:03:16 +0100 Message-Id: <20240625200316.4282-10-paul.barker.ct@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240625200316.4282-1-paul.barker.ct@bp.renesas.com> References: <20240625200316.4282-1-paul.barker.ct@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On the RZ/G2UL & RZ/Five SMARC SOMs, the RGMII interface between the SoC and the Ethernet PHY operates at 1.8V. The power supply for this interface may be correctly configured in u-boot, but the kernel should not be relying on this. Now that the RZ/G2L pinctrl driver supports configuring the Ethernet power supply voltage, we can simply specify the desired voltage in the device tree. Signed-off-by: Paul Barker Reviewed-by: Geert Uytterhoeven Acked-by: Linus Walleij --- Changes v2->v3: * Picked up Linus W's Acked-by tag. Changes v1->v2: * Picked up Geert's Reviewed-by tag. .../boot/dts/renesas/rzg2ul-smarc-som.dtsi | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi index 417f49090b15..79443fb3f581 100644 --- a/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi @@ -144,6 +144,7 @@ adc_pins: adc { eth0_pins: eth0 { txc { pinmux = ; /* ET0_TXC */ + power-source = <1800>; output-enable; }; @@ -161,14 +162,19 @@ mux { , /* ET0_RXD0 */ , /* ET0_RXD1 */ , /* ET0_RXD2 */ - , /* ET0_RXD3 */ - ; /* IRQ2 */ + ; /* ET0_RXD3 */ + power-source = <1800>; + }; + + irq { + pinmux = ; /* IRQ2 */ }; }; eth1_pins: eth1 { txc { pinmux = ; /* ET1_TXC */ + power-source = <1800>; output-enable; }; @@ -186,8 +192,12 @@ mux { , /* ET1_RXD0 */ , /* ET1_RXD1 */ , /* ET1_RXD2 */ - , /* ET1_RXD3 */ - ; /* IRQ7 */ + ; /* ET1_RXD3 */ + power-source = <1800>; + }; + + irq { + pinmux = ; /* IRQ7 */ }; };