From patchwork Wed Jan 31 16:26:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 768643 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 456DA135413; Wed, 31 Jan 2024 16:27:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706718447; cv=none; b=LhMMfSHtadogoev+YQL7VbYVd705PWJq4AJatyYLt4HyIXoIOUY9Ab4m0hZN8WO6ws2nvtsVKDeuW5ooPcHIxjr5mv4jXeEjLgQmXwZEC9uxRxPoGvVs8/8iDevHBRnXnnDjfrTjd5u5mfG3WjeUn8r4vIijIGeZBiYQA6lRgt0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706718447; c=relaxed/simple; bh=NdXxW2B2HJGeJDq0KUeu7mzlupLoCiWlMtwgDlwuvTE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OsLf8Qkhh9HudFG+rFacH0z4Y3wgDQfIsESxpfFNCtKttDgJ3aTtH2Ddj6Hn+2Yl14OTgEd0L1Xiu7BpvWDCpaA67lf2FeJz6a1wOzw2Y0yn1GeBzq9UYcQFxcHSbS0DyRuilqLUyB1OFrawjIUuKVhTQxfqnZN4WMSYgVSPhXM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=j40VU6kD; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="j40VU6kD" Received: by mail.gandi.net (Postfix) with ESMTPSA id 00A3E40007; Wed, 31 Jan 2024 16:27:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1706718442; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0ldyJrn/6hMrKL66J7c4uEBP6rhcVzqhrRn+hm5cRxo=; b=j40VU6kDHEncJGPWRFDSRmW7RIiUn0th58GxZZ14+rQVV3xrvlhQPgkjqPwIv51V8iYh0m muo1WWcMx60qdnBH2FFgQc50sMfbWTxjWGzcorvrWHcGZ0T5qK+9qp8WQ64dNWFmmiwyxt trdpmjViM2u4TL4JGaggEF+d9DJkig/JYGUu/djfo3AgPKyJbOBh8VZEQzeQQTH6QyigKH HJICZUzKeZaegJhiAFWwPa0Zd0GfOInGVaB3JQv5NHo/I4re/a4uOH9E/y45DrDusClq41 3iOEep0Jn3+KkYPXMRwhAOHU80NAtdvjhJ6E2+aUerazwyAMc85rp1vimSDcew== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Wed, 31 Jan 2024 17:26:28 +0100 Subject: [PATCH v4 15/18] MIPS: mobileye: eyeq5: add OLB reset controller node Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240131-mbly-clk-v4-15-bcd00510d6a0@bootlin.com> References: <20240131-mbly-clk-v4-0-bcd00510d6a0@bootlin.com> In-Reply-To: <20240131-mbly-clk-v4-0-bcd00510d6a0@bootlin.com> To: Gregory CLEMENT , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Bogendoerfer , Linus Walleij , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Philipp Zabel Cc: Vladimir Kondratiev , linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Tawfik Bayouk , linux-gpio@vger.kernel.org, =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.12.4 X-GND-Sasl: theo.lebrun@bootlin.com Add the devicetree node for the reset controller on the Mobileye EyeQ5 platform. It appears as a subnode to the OLB syscon as its registers are located in this shared register region. Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 69f89793fed7..06e941b0ce10 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -115,6 +115,13 @@ clocks: clock-controller@e0002c { clocks = <&xtal>; clock-names = "ref"; }; + + reset: reset-controller@e00000 { + compatible = "mobileye,eyeq5-reset"; + reg = <0x000 0x0c>, <0x200 0x34>, <0x120 0x04>; + reg-names = "d0", "d1", "d2"; + #reset-cells = <2>; + }; }; gic: interrupt-controller@140000 {