From patchwork Wed Nov 22 16:35:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 747330 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="a9ZmNybD" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4FC09F9; Wed, 22 Nov 2023 08:51:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700671912; x=1732207912; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NE+17+HWJqu1tvwDbF/Yy56Y9wnjeE8kjUUulypb5zo=; b=a9ZmNybDpGQrFblyQHghZ++eHsVWhruvjyfGoatsVTCL8kYJiVVfiUG1 7hE69BwxWvSd+LHeyMFgMUnvbhvggCIXdltnHk6cCHGIDFD/9n8Gtf2ar B2o4FBE29mXjei7kDeMrm6lowD9nGzQpNd2HsiX7Iq/l8UV+JFxxcX1nk Nyc1kx8pRVRY/Ybm+vY8e1UnCFa/NFGgtx7C6bZdG1rmZqNTeHUwuO8p5 I/oyCYUwftxapNOkPQNDKCP0nNxwrNfrWXsD6lkj5bsFsrsmMiyKotYNY Pixf0O0idNXCKGdHIzrWsOW1/SI/jDUsxvJhwh2UbK60xMesud6GCQTfS w==; X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="5233303" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="5233303" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Nov 2023 08:51:25 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="910887955" X-IronPort-AV: E=Sophos;i="6.04,219,1695711600"; d="scan'208";a="910887955" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 22 Nov 2023 08:51:16 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id AC5237AF; Wed, 22 Nov 2023 18:40:45 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v1 12/17] pinctrl: ingenic: Convert to use grp member Date: Wed, 22 Nov 2023 18:35:44 +0200 Message-ID: <20231122164040.2262742-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> References: <20231122164040.2262742-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-ingenic.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 393873de910a..6806fede5df4 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -3756,17 +3756,17 @@ static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; dev_dbg(pctldev->dev, "enable function %s group %s\n", - func->name, grp->name); + func->name, grp->grp.name); mode = (uintptr_t)grp->data; if (mode <= 3) { - for (i = 0; i < grp->num_pins; i++) - ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], mode); + for (i = 0; i < grp->grp.npins; i++) + ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], mode); } else { pin_modes = grp->data; - for (i = 0; i < grp->num_pins; i++) - ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]); + for (i = 0; i < grp->grp.npins; i++) + ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], pin_modes[i]); } return 0; @@ -4293,12 +4293,12 @@ static int __init ingenic_pinctrl_probe(struct platform_device *pdev) for (i = 0; i < chip_info->num_groups; i++) { const struct group_desc *group = &chip_info->groups[i]; + const struct pingroup *grp = &group->grp; - err = pinctrl_generic_add_group(jzpc->pctl, group->name, - group->pins, group->num_pins, group->data); + err = pinctrl_generic_add_group(jzpc->pctl, grp->name, grp->pins, grp->npins, + group->data); if (err < 0) { - dev_err(dev, "Failed to register group %s\n", - group->name); + dev_err(dev, "Failed to register group %s\n", grp->name); return err; } }