From patchwork Fri Sep 8 05:51:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linhua Xu X-Patchwork-Id: 721193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80943EE57CC for ; Fri, 8 Sep 2023 05:52:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236576AbjIHFwZ (ORCPT ); Fri, 8 Sep 2023 01:52:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230208AbjIHFwY (ORCPT ); Fri, 8 Sep 2023 01:52:24 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20D0919BC for ; Thu, 7 Sep 2023 22:52:19 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 3885q214009995; Fri, 8 Sep 2023 13:52:02 +0800 (+08) (envelope-from linhua.xu@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4RhlXz3YHlz2Rb6KB; Fri, 8 Sep 2023 13:49:07 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Fri, 8 Sep 2023 13:52:00 +0800 From: Linhua Xu To: Linus Walleij CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , Andy Shevchenko , lh xu , Linhua Xu , Zhirong Qiu , Xiongpeng Wu Subject: [PATCH V2 2/6] pinctrl: sprd: Fix the incorrect mask and shift definition Date: Fri, 8 Sep 2023 13:51:42 +0800 Message-ID: <20230908055146.18347-3-Linhua.xu@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230908055146.18347-1-Linhua.xu@unisoc.com> References: <20230908055146.18347-1-Linhua.xu@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 3885q214009995 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Linhua Xu Pull-up and pull-down are mutually exclusive. When setting one of them, the bit of the other needs to be clear. Now, there are cases where pull-up and pull-down are set at the same time in the code, thus fix them. Signed-off-by: Linhua Xu --- drivers/pinctrl/sprd/pinctrl-sprd.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/sprd/pinctrl-sprd.c b/drivers/pinctrl/sprd/pinctrl-sprd.c index 25fb9ce9ad78..5b9126b2cde2 100644 --- a/drivers/pinctrl/sprd/pinctrl-sprd.c +++ b/drivers/pinctrl/sprd/pinctrl-sprd.c @@ -58,21 +58,21 @@ #define DRIVE_STRENGTH_SHIFT 19 #define SLEEP_PULL_DOWN BIT(2) -#define SLEEP_PULL_DOWN_MASK 0x1 +#define SLEEP_PULL_DOWN_MASK GENMASK(1, 0) #define SLEEP_PULL_DOWN_SHIFT 2 #define PULL_DOWN BIT(6) -#define PULL_DOWN_MASK 0x1 +#define PULL_DOWN_MASK (GENMASK(1, 0) | BIT(6)) #define PULL_DOWN_SHIFT 6 #define SLEEP_PULL_UP BIT(3) -#define SLEEP_PULL_UP_MASK 0x1 -#define SLEEP_PULL_UP_SHIFT 3 +#define SLEEP_PULL_UP_MASK GENMASK(1, 0) +#define SLEEP_PULL_UP_SHIFT 2 #define PULL_UP_4_7K (BIT(12) | BIT(7)) #define PULL_UP_20K BIT(7) -#define PULL_UP_MASK 0x21 -#define PULL_UP_SHIFT 7 +#define PULL_UP_MASK (GENMASK(1, 0) | BIT(6)) +#define PULL_UP_SHIFT 6 #define INPUT_SCHMITT BIT(11) #define INPUT_SCHMITT_MASK 0x1