From patchwork Mon Sep 4 11:58:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 720040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D6E7CA0FF3 for ; Mon, 4 Sep 2023 11:58:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351464AbjIDL6l (ORCPT ); Mon, 4 Sep 2023 07:58:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352869AbjIDL6g (ORCPT ); Mon, 4 Sep 2023 07:58:36 -0400 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6284195 for ; Mon, 4 Sep 2023 04:58:33 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qd8Dl-0003r4-2P; Mon, 04 Sep 2023 13:58:21 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1qd8Dk-003s49-Jh; Mon, 04 Sep 2023 13:58:20 +0200 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1qd8Dj-005pOr-HB; Mon, 04 Sep 2023 13:58:19 +0200 From: Sascha Hauer To: linux-rockchip@lists.infradead.org Cc: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, kernel@pengutronix.de, Quentin Schulz , Michael Riesch , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer Subject: [PATCH 2/3] dt-bindings: pinctrl: rockchip: Add io domain properties Date: Mon, 4 Sep 2023 13:58:15 +0200 Message-Id: <20230904115816.1237684-3-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230904115816.1237684-1-s.hauer@pengutronix.de> References: <20230904115816.1237684-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-gpio@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add rockchip,io-domains property to the Rockchip pinctrl driver. This list of phandles points to the IO domain device(s) the pins of the pinctrl driver are supplied from. Also a rockchip,io-domain-boot-on property is added to pin groups which can be used for pin groups which themselves are needed to access the regulators an IO domain is driven from. Signed-off-by: Sascha Hauer --- .../bindings/pinctrl/rockchip,pinctrl.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml index 10c335efe619e..92075419d29cf 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml @@ -62,6 +62,11 @@ properties: Required for at least rk3188 and rk3288. On the rk3368 this should point to the PMUGRF syscon. + rockchip,io-domains: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandles to io domains + "#address-cells": enum: [1, 2] @@ -137,7 +142,13 @@ additionalProperties: - description: The phandle of a node contains the generic pinconfig options to use as described in pinctrl-bindings.txt. - + rockchip,io-domain-boot-on: + type: boolean + description: + If true assume that the io domain needed for this pin group has been + configured correctly by the bootloader. This is needed to break cyclic + dependencies introduced when a io domain needs a regulator that can be + accessed through pins configured here. examples: - | #include