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[78.94.0.51]) by smtp.gmail.com with ESMTPSA id t9-20020a5d5349000000b003143b7449ffsm4475140wrv.25.2023.07.12.01.52.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jul 2023 01:52:41 -0700 (PDT) From: Naresh Solanki X-Google-Original-From: Naresh Solanki To: Patrick Rudolph , Linus Walleij Cc: Naresh Solanki , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] pinctrl: cy8c95x0: Add reset support Date: Wed, 12 Jul 2023 10:52:35 +0200 Message-ID: <20230712085236.2496651-2-Naresh.Solanki@9elements.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230712085236.2496651-1-Naresh.Solanki@9elements.com> References: <20230712085236.2496651-1-Naresh.Solanki@9elements.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Patrick Rudolph This patch adds support for an optional "reset" GPIO pin in the cy8c95x0 pinctrl driver. On probe, the reset pin is pulled low to bring chip out of reset. The reset pin has an internal pull-down and can be left floating if not required. The datasheet doesn't mention any timing related to the reset pin. Based on empirical tests, it was found that the chip requires a delay of 250 milliseconds before accepting I2C transfers after driving the reset pin low. Therefore, a delay of 250ms is added before proceeding with I2C transfers. Signed-off-by: Patrick Rudolph Signed-off-by: Naresh Solanki --- Changes in V2: - None --- drivers/pinctrl/pinctrl-cy8c95x0.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 2ecc96691c55..58ca6fac7849 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -164,6 +164,7 @@ struct cy8c95x0_pinctrl { struct pinctrl_desc pinctrl_desc; char name[32]; unsigned int tpin; + struct gpio_desc *gpio_reset; }; static const struct pinctrl_pin_desc cy8c9560_pins[] = { @@ -1383,6 +1384,20 @@ static int cy8c95x0_probe(struct i2c_client *client) chip->regulator = reg; } + /* bring the chip out of reset if reset pin is provided */ + chip->gpio_reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(chip->gpio_reset)) { + ret = dev_err_probe(chip->dev, PTR_ERR(chip->gpio_reset), + "Failed to get GPIO 'reset'\n"); + goto err_exit; + } else if (chip->gpio_reset) { + usleep_range(1000, 2000); + gpiod_set_value_cansleep(chip->gpio_reset, 0); + usleep_range(250000, 300000); + + gpiod_set_consumer_name(chip->gpio_reset, "CY8C95X0 RESET"); + } + chip->regmap = devm_regmap_init_i2c(client, &cy8c95x0_i2c_regmap); if (IS_ERR(chip->regmap)) { ret = PTR_ERR(chip->regmap);