From patchwork Tue Apr 4 09:43:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 670638 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B5F4C761AF for ; Tue, 4 Apr 2023 09:43:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234236AbjDDJnP (ORCPT ); Tue, 4 Apr 2023 05:43:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234291AbjDDJnO (ORCPT ); Tue, 4 Apr 2023 05:43:14 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58B0A1BD6 for ; Tue, 4 Apr 2023 02:43:12 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id c9so31183786lfb.1 for ; Tue, 04 Apr 2023 02:43:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1680601390; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=RKK9eLgubzxWPHMWxI1yK7d1/+43BWwyQkM2tfuG2Ww=; b=x7ppiWbyNyZwwriIorzWRnpZP4rWgQx6yFQbqXqh1OXDLJel4zda/pCcS6POdONcaG 7Yv3e7fbUTqfjUrHeAtVc5xqJ4Gmz4/GtSFu4grqH+f3gGPtr0jGvRyKK6vRApV0uNNn pBO5KB050ARhuPvDhuT2MFcCNRi/fcfb9A8aqygpgQrVbjwJfG7hcodVt+q/oS/Bx9LW /fnKSlEVfDctfs5GeV3aYtiORbT1k5+p5mQ5pjXT0uBW89SPhm+5PXh2tDA/qmLebjcZ KK5Dn3f/RObhVpTmQsLbGJDuntgJHC8ftHLkH2+hc+DxBbBxb4xgIHwtdQT4P8ohou1j CfyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680601390; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RKK9eLgubzxWPHMWxI1yK7d1/+43BWwyQkM2tfuG2Ww=; b=GQxWfwDKfpFgkzkuWyuLvIom0OZyJ+ZZ/xxW2Lg8a6TCBTlALMpStnhAubLdlN4bdJ oREQSR+83MzJ6tJdbPXoe6oi+lLKv2awGBiqR7vbGZnmtW1jnyLoU+j0DUFC10/cceGz 1XAJjaGVLaohy3fiAdAxJvhoBqIlCukY0ExVIkwXH38+RFDc1Hwy5qnyv7H712Zxb1i2 sStNilHNhv3x6K1iBc/UpYeJIyCgdDW+/26zaIe2ut+6q2/eLjxR6U/aVENdP21clJjj tkwsUkkpUK1UntvWZFd0vloRA8uHf2hjjAgEWgW21SQZ+GdzgqHXSgCUPWV6gx/qXiqE D5ZQ== X-Gm-Message-State: AAQBX9da74K6fuUJLn2nuIMcjexbdjD+S4ScrukqbPlrzQcW8PzgOzuH yHrE0/i4rVHBvCDo3cwaAfm+dg== X-Google-Smtp-Source: AKy350bXU9qE5on50GOy/zA3QRbSNFs+CqcTvsLk9DkI3fNquQp8y9IwP/2sQB6t0bTIVTgIgnAjHw== X-Received: by 2002:ac2:4c92:0:b0:4df:b32b:a2a3 with SMTP id d18-20020ac24c92000000b004dfb32ba2a3mr477734lfl.47.1680601390612; Tue, 04 Apr 2023 02:43:10 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id l25-20020a19c219000000b004eb258f73a9sm2218443lfc.163.2023.04.04.02.43.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 Apr 2023 02:43:10 -0700 (PDT) From: Linus Walleij Date: Tue, 04 Apr 2023 11:43:03 +0200 Subject: [PATCH 1/9] pinctrl: iproc: Convert to immutable irq_chip MIME-Version: 1.0 Message-Id: <20230403-immutable-irqchips-v1-1-503788a7f6e6@linaro.org> References: <20230403-immutable-irqchips-v1-0-503788a7f6e6@linaro.org> In-Reply-To: <20230403-immutable-irqchips-v1-0-503788a7f6e6@linaro.org> To: Ray Jui , Scott Branden , Broadcom internal kernel review list , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Patrice Chotard , Maxime Coquelin , Alexandre Torgue Cc: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-stm32@st-md-mailman.stormreply.com, Linus Walleij , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier Signed-off-by: Linus Walleij --- drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 38 +++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c index 3df56a4ea510..cc3eb7409ab3 100644 --- a/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c +++ b/drivers/pinctrl/bcm/pinctrl-iproc-gpio.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -108,7 +109,6 @@ struct iproc_gpio { raw_spinlock_t lock; - struct irq_chip irqchip; struct gpio_chip gc; unsigned num_banks; @@ -217,7 +217,7 @@ static void iproc_gpio_irq_set_mask(struct irq_data *d, bool unmask) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct iproc_gpio *chip = gpiochip_get_data(gc); - unsigned gpio = d->hwirq; + unsigned gpio = irqd_to_hwirq(d); iproc_set_bit(chip, IPROC_GPIO_INT_MSK_OFFSET, gpio, unmask); } @@ -231,6 +231,7 @@ static void iproc_gpio_irq_mask(struct irq_data *d) raw_spin_lock_irqsave(&chip->lock, flags); iproc_gpio_irq_set_mask(d, false); raw_spin_unlock_irqrestore(&chip->lock, flags); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } static void iproc_gpio_irq_unmask(struct irq_data *d) @@ -239,6 +240,7 @@ static void iproc_gpio_irq_unmask(struct irq_data *d) struct iproc_gpio *chip = gpiochip_get_data(gc); unsigned long flags; + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); raw_spin_lock_irqsave(&chip->lock, flags); iproc_gpio_irq_set_mask(d, true); raw_spin_unlock_irqrestore(&chip->lock, flags); @@ -302,6 +304,26 @@ static int iproc_gpio_irq_set_type(struct irq_data *d, unsigned int type) return 0; } +static void iproc_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) +{ + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct iproc_gpio *chip = gpiochip_get_data(gc); + + seq_printf(p, dev_name(chip->dev)); +} + +static const struct irq_chip iproc_gpio_irq_chip = { + .irq_ack = iproc_gpio_irq_ack, + .irq_mask = iproc_gpio_irq_mask, + .irq_unmask = iproc_gpio_irq_unmask, + .irq_set_type = iproc_gpio_irq_set_type, + .irq_enable = iproc_gpio_irq_unmask, + .irq_disable = iproc_gpio_irq_mask, + .irq_print_chip = iproc_gpio_irq_print_chip, + .flags = IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, +}; + /* * Request the Iproc IOMUX pinmux controller to mux individual pins to GPIO */ @@ -852,20 +874,10 @@ static int iproc_gpio_probe(struct platform_device *pdev) /* optional GPIO interrupt support */ irq = platform_get_irq_optional(pdev, 0); if (irq > 0) { - struct irq_chip *irqc; struct gpio_irq_chip *girq; - irqc = &chip->irqchip; - irqc->name = dev_name(dev); - irqc->irq_ack = iproc_gpio_irq_ack; - irqc->irq_mask = iproc_gpio_irq_mask; - irqc->irq_unmask = iproc_gpio_irq_unmask; - irqc->irq_set_type = iproc_gpio_irq_set_type; - irqc->irq_enable = iproc_gpio_irq_unmask; - irqc->irq_disable = iproc_gpio_irq_mask; - girq = &gc->irq; - girq->chip = irqc; + gpio_irq_chip_set_chip(girq, &iproc_gpio_irq_chip); girq->parent_handler = iproc_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(dev, 1,