From patchwork Thu Mar 16 07:29:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Devi Priya X-Patchwork-Id: 664342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA671C7618A for ; Thu, 16 Mar 2023 07:31:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230197AbjCPHbE (ORCPT ); Thu, 16 Mar 2023 03:31:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230162AbjCPHbC (ORCPT ); Thu, 16 Mar 2023 03:31:02 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A29080927; Thu, 16 Mar 2023 00:30:56 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32G24khT023984; Thu, 16 Mar 2023 07:30:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=T5bqZBj+tZ/HlFYG77Jj/5FgFjB/xFw7Iscr7RVKL/E=; b=CGWokx9H3lvbFs2PLaExTRnWxcoqP3c9OW+9LrdC+E7Lb0VNHnbqq4D20i/TDxTYA2U9 eeIhOrPr4/1VpJKcbohpmBHTFK15KwlJZPn+bkofwyYqOvakLSWMALTkkohehFKMHwks 10+++9h9wAdQ+H7Lzge5MXfWO6aAh68CAf90UfupjIULlMqvheOMXzJu4hNvNgFD6y2l /+Ee7ROgdv8eijFMlQfNdALfDFvUji2fEq7utKzWjiRbmI1dnQKWIvtMTUvjoHAPhK7h 1mW5hLo4+vMr/McdpZ00PKu3sbpUmOMfWQRkfn92BDR8wY4UbdqYOnK5VhpZebdSFhjS WQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3pbpy3927p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Mar 2023 07:30:40 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 32G7UcR1026139 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 Mar 2023 07:30:38 GMT Received: from devipriy-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Thu, 16 Mar 2023 00:30:30 -0700 From: Devi Priya To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Subject: [PATCH V9 3/6] dt-bindings: pinctrl: qcom: Add support for IPQ9574 Date: Thu, 16 Mar 2023 12:59:37 +0530 Message-ID: <20230316072940.29137-4-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230316072940.29137-1-quic_devipriy@quicinc.com> References: <20230316072940.29137-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SkamLZEyI2m1sfUaEbsLQj5jK763TPdi X-Proofpoint-GUID: SkamLZEyI2m1sfUaEbsLQj5jK763TPdi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-16_05,2023-03-15_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 impostorscore=0 adultscore=0 phishscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 mlxscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303160062 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add new binding document for pinctrl on IPQ9574 Reviewed-by: Krzysztof Kozlowski Co-developed-by: Anusha Rao Signed-off-by: Anusha Rao Signed-off-by: Devi Priya --- Changes in V9: - Added the Reviewed-by tag .../bindings/pinctrl/qcom,ipq9574-tlmm.yaml | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml new file mode 100644 index 000000000000..f32239d08c32 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9574-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. IPQ9574 TLMM block + +maintainers: + - Bjorn Andersson + - Krzysztof Kozlowski + +description: + Top Level Mode Multiplexer pin controller in Qualcomm IPQ9574 SoC. + +properties: + compatible: + const: qcom,ipq9574-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + "#interrupt-cells": true + gpio-controller: true + "#gpio-cells": true + gpio-ranges: true + wakeup-parent: true + + gpio-reserved-ranges: + minItems: 1 + maxItems: 33 + + gpio-line-names: + maxItems: 65 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-ipq9574-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-ipq9574-tlmm-state" + additionalProperties: false + +$defs: + qcom-ipq9574-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-5][0-9]|6[0-4])$" + minItems: 1 + maxItems: 8 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + + enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3, + audio_pdm0, audio_pdm1, audio_pri, audio_sec, blsp0_spi, blsp0_uart, + blsp1_i2c, blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, + blsp2_uart, blsp3_i2c, blsp3_spi, blsp3_uart, blsp4_i2c, + blsp4_spi, blsp4_uart, blsp5_i2c, blsp5_uart, cri_trng0, + cri_trng1, cri_trng3, cxc0, cxc1, dbg_out, dwc_ddrphy, + gcc_plltest, gcc_tlmm, mac, mdc, mdio, pcie0_clk, pcie0_wake, + pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, pcie3_clk, pcie3_wake, + prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pta, pwm, + qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, + qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1, + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a, + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, + qdss_tracedata_b, qdss_tracedata_b, qspi_clk, qspi_cs, qspi_data, + rx0, rx1, sdc_clk, sdc_cmd, sdc_data, sdc_rclk, tsens_max, + wci20, wci21, wsa_swrm ] + + bias-pull-down: true + bias-pull-up: true + bias-disable: true + drive-strength: true + input-enable: true + output-high: true + output-low: true + + required: + - pins + + additionalProperties: false + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq9574-tlmm"; + reg = <0x01000000 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 65>; + + uart2-state { + pins = "gpio34", "gpio35"; + function = "blsp2_uart"; + drive-strength = <8>; + bias-pull-down; + }; + };