From patchwork Sat Oct 29 11:35:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Weilong Chen X-Patchwork-Id: 619910 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A7CAC433FE for ; Sat, 29 Oct 2022 11:28:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229647AbiJ2L2S (ORCPT ); Sat, 29 Oct 2022 07:28:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229634AbiJ2L2R (ORCPT ); Sat, 29 Oct 2022 07:28:17 -0400 Received: from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDDF368893; Sat, 29 Oct 2022 04:28:12 -0700 (PDT) Received: from canpemm500004.china.huawei.com (unknown [172.30.72.53]) by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4Mzxss147wzFq7m; Sat, 29 Oct 2022 19:25:21 +0800 (CST) Received: from localhost (10.175.101.6) by canpemm500004.china.huawei.com (7.192.104.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.31; Sat, 29 Oct 2022 19:28:10 +0800 From: Weilong Chen To: , , , , , CC: , , Subject: [PATCH next v3 2/2] dt-bindings: gpio: add entry for hisilicon,ascend910-gpio Date: Sat, 29 Oct 2022 19:35:42 +0800 Message-ID: <20221029113542.170210-2-chenweilong@huawei.com> X-Mailer: git-send-email 2.31.GIT In-Reply-To: <20221029113542.170210-1-chenweilong@huawei.com> References: <20221029113542.170210-1-chenweilong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.101.6] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To canpemm500004.china.huawei.com (7.192.104.92) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add the new compatible for HiSilicon gpio controller driver. Signed-off-by: Weilong Chen --- Change since v2: - Drop "|" in description - Same style of quotes - Same order properties Link: https://lore.kernel.org/lkml/20221028022453.163186-2-chenweilong@huawei.com/ .../gpio/hisilicon,ascend910-gpio.yaml | 56 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml diff --git a/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml b/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml new file mode 100644 index 000000000000..735d97d645a0 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/hisilicon,ascend910-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon common GPIO controller + +maintainers: + - Jay Fang + +description: + The HiSilicon common GPIO controller can be used for many different + types of SoC such as Huawei Ascend AI series chips. + +properties: + compatible: + const: hisilicon,ascend910-gpio + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + ngpios: + minimum: 1 + maximum: 32 + +required: + - compatible + - reg + - interrupts + - gpio-controller + - "#gpio-cells" + - ngpios + +additionalProperties: false + +examples: + - | + #include + + gpio@840d0000 { + compatible = "hisilicon,ascend910-gpio"; + reg = <0x840d0000 0x1000>; + ngpios = <32>; + gpio-controller; + #gpio-cells = <2>; + interrupts = ; + }; diff --git a/MAINTAINERS b/MAINTAINERS index d42e34d1e8e2..74ac2e7a8e4b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9212,6 +9212,7 @@ HISILICON GPIO DRIVER M: Jay Fang L: linux-gpio@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml F: drivers/gpio/gpio-hisi.c HISILICON HIGH PERFORMANCE RSA ENGINE DRIVER (HPRE)