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[v1,19/30] dt-bindings: clock: Add StarFive JH7110 always-on definitions

Message ID 20220930054943.4744-1-hal.feng@linux.starfivetech.com
State New
Headers show
Series Basic StarFive JH7110 RISC-V SoC support | expand

Commit Message

Hal Feng Sept. 30, 2022, 5:49 a.m. UTC 
From: Emil Renner Berthing <kernel@esmil.dk>

Add all clock outputs for the StarFive JH7110 always-on clock generator.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com>
---
 .../dt-bindings/clock/starfive-jh7110-aon.h   | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 include/dt-bindings/clock/starfive-jh7110-aon.h
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Patch

diff --git a/include/dt-bindings/clock/starfive-jh7110-aon.h b/include/dt-bindings/clock/starfive-jh7110-aon.h
new file mode 100644
index 000000000000..5f1f7f2f1533
--- /dev/null
+++ b/include/dt-bindings/clock/starfive-jh7110-aon.h
@@ -0,0 +1,26 @@ 
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * Copyright 2022 Emil Renner Berthing <kernel@esmil.dk>
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7110_AON_H__
+#define __DT_BINDINGS_CLOCK_STARFIVE_JH7110_AON_H__
+
+#define JH7110_AONCLK_OSC_DIV4			 0
+#define JH7110_AONCLK_APB_FUNC			 1
+#define JH7110_AONCLK_GMAC0_AHB			 2
+#define JH7110_AONCLK_GMAC0_AXI			 3
+#define JH7110_AONCLK_GMAC0_RMII_RTX		 4
+#define JH7110_AONCLK_GMAC0_TX			 5
+#define JH7110_AONCLK_GMAC0_TX_INV		 6
+#define JH7110_AONCLK_GMAC0_RX			 7
+#define JH7110_AONCLK_GMAC0_RX_INV		 8
+#define JH7110_AONCLK_OTPC_APB			 9
+#define JH7110_AONCLK_RTC_APB			10
+#define JH7110_AONCLK_RTC_INTERNAL		11
+#define JH7110_AONCLK_RTC_32K			12
+#define JH7110_AONCLK_RTC_CAL			13
+
+#define JH7110_AONCLK_END			14
+
+#endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7110_H__ */