From patchwork Thu Sep 29 14:32:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hal Feng X-Patchwork-Id: 610686 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7565BC433F5 for ; Thu, 29 Sep 2022 15:51:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235507AbiI2Pvg (ORCPT ); Thu, 29 Sep 2022 11:51:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51316 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234352AbiI2Pvf (ORCPT ); Thu, 29 Sep 2022 11:51:35 -0400 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.221.58]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 548B94E846; Thu, 29 Sep 2022 08:51:32 -0700 (PDT) X-QQ-Spam: true X-QQ-mid: bizesmtp84t1664461974tg6jmmmc Received: from localhost.localdomain ( [113.72.145.157]) by bizesmtp.qq.com (ESMTP) with id ; Thu, 29 Sep 2022 22:32:53 +0800 (CST) X-QQ-SSF: 01000000002000201000B00A0000000 From: Hal Feng To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Philipp Zabel , Stephen Boyd , Michael Turquette , Linus Walleij , Emil Renner Berthing , Hal Feng , linux-kernel@vger.kernel.org Subject: [PATCH v1 06/30] soc: sifive: l2 cache: Add StarFive JH71x0 support Date: Thu, 29 Sep 2022 22:32:01 +0800 Message-Id: <20220929143225.17907-7-hal.feng@linux.starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> References: <20220929143225.17907-1-hal.feng@linux.starfivetech.com> X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:linux.starfivetech.com:qybglogicsvr:qybglogicsvr2 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Emil Renner Berthing This adds support for the StarFive JH7100 and JH7110 SoCs which also feature this SiFive cache controller. Unfortunately the interrupt for uncorrected data is broken on the JH7100 and fires continuously, so add a quirk to not register a handler for it. Signed-off-by: Emil Renner Berthing Signed-off-by: Hal Feng --- arch/riscv/Kconfig.socs | 1 + drivers/soc/Makefile | 2 +- drivers/soc/sifive/Kconfig | 2 +- drivers/soc/sifive/sifive_l2_cache.c | 7 +++++++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 69774bb362d6..10f68a4359f9 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -22,6 +22,7 @@ config SOC_STARFIVE bool "StarFive SoCs" select PINCTRL select RESET_CONTROLLER + select SIFIVE_L2 select SIFIVE_PLIC help This enables support for StarFive SoC platform hardware. diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 69ba6508cf2c..534669840858 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -26,7 +26,7 @@ obj-y += qcom/ obj-y += renesas/ obj-y += rockchip/ obj-$(CONFIG_SOC_SAMSUNG) += samsung/ -obj-$(CONFIG_SOC_SIFIVE) += sifive/ +obj-y += sifive/ obj-y += sunxi/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-y += ti/ diff --git a/drivers/soc/sifive/Kconfig b/drivers/soc/sifive/Kconfig index 58cf8c40d08d..776b30723c04 100644 --- a/drivers/soc/sifive/Kconfig +++ b/drivers/soc/sifive/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 -if SOC_SIFIVE +if SOC_SIFIVE || SOC_STARFIVE config SIFIVE_L2 bool "Sifive L2 Cache controller" diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c index 010d612f7420..d6637254977f 100644 --- a/drivers/soc/sifive/sifive_l2_cache.c +++ b/drivers/soc/sifive/sifive_l2_cache.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -189,6 +190,7 @@ static irqreturn_t l2_int_handler(int irq, void *device) static int __init sifive_l2_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + unsigned long quirks = (uintptr_t)device_get_match_data(dev); int nirqs; int ret; int i; @@ -206,6 +208,9 @@ static int __init sifive_l2_probe(struct platform_device *pdev) if (g_irq[i] < 0) return g_irq[i]; + if (quirks & BIT(i)) + continue; + ret = devm_request_irq(dev, g_irq[i], l2_int_handler, 0, pdev->name, NULL); if (ret) return dev_err_probe(dev, ret, "Could not request IRQ %d\n", g_irq[i]); @@ -225,6 +230,8 @@ static int __init sifive_l2_probe(struct platform_device *pdev) static const struct of_device_id sifive_l2_match[] = { { .compatible = "sifive,fu540-c000-ccache" }, { .compatible = "sifive,fu740-c000-ccache" }, + { .compatible = "starfive,jh7100-ccache", .data = (void *)BIT(DATA_UNCORR) }, + { .compatible = "starfive,jh7110-ccache" }, { /* sentinel */ } };