| Message ID | 20220927153429.55365-2-krzysztof.kozlowski@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings | expand |
On 27/09/2022 17:34, Krzysztof Kozlowski wrote: > The LPASS pin-controller is not a clock provider: > > qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 8d807b7bf66a..8823b75a6f1b 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -2432,8 +2432,6 @@ lpass_tlmm: pinctrl@33c0000 { > #gpio-cells = <2>; > gpio-ranges = <&lpass_tlmm 0 0 15>; > > - #clock-cells = <1>; > - > lpass_dmic01_clk: dmic01-clk { > pins = "gpio6"; > function = "dmic1_clk"; Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 8d807b7bf66a..8823b75a6f1b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2432,8 +2432,6 @@ lpass_tlmm: pinctrl@33c0000 { #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 15>; - #clock-cells = <1>; - lpass_dmic01_clk: dmic01-clk { pins = "gpio6"; function = "dmic1_clk";
The LPASS pin-controller is not a clock provider: qcom/sc7280-herobrine-herobrine-r1.dtb: pinctrl@33c0000: '#clock-cells' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 -- 1 file changed, 2 deletions(-)