From patchwork Mon Aug 29 08:21:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 601302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDBDEC3DA6B for ; Mon, 29 Aug 2022 08:22:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229756AbiH2IWh (ORCPT ); Mon, 29 Aug 2022 04:22:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229909AbiH2IWf (ORCPT ); Mon, 29 Aug 2022 04:22:35 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3C1295723E; Mon, 29 Aug 2022 01:22:31 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 27T8MIaU028612; Mon, 29 Aug 2022 03:22:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1661761338; bh=0p631o+37+RBsDxNt/tvZKJK942T9FsIOH4T8evU86g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XKfgwIvzyUNHzXLqmES5XQoJBW2h2rHJiHoEQGUfd7jVgWQilHKvrLg54Bpx6hYdC 3F4KunjzJawGeUIWPSAuCTOwwf2sWYqNkFJK1QB6LAd/NIDT7gUgS/wGC0GmSa4tY+ 8/7qfB9MZ1OfAk54+xA1icuIVn+6U0Hl1FYuA/1o= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 27T8MIPw029582 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 29 Aug 2022 03:22:18 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Mon, 29 Aug 2022 03:22:17 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Mon, 29 Aug 2022 03:22:17 -0500 Received: from uda0132425.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 27T8M7Yb059309; Mon, 29 Aug 2022 03:22:14 -0500 From: Vignesh Raghavendra To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Linus Walleij CC: , , , , Bryan Brattlof Subject: [PATCH 2/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A Date: Mon, 29 Aug 2022 13:51:58 +0530 Message-ID: <20220829082200.241653-3-vigneshr@ti.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220829082200.241653-1-vigneshr@ti.com> References: <20220829082200.241653-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add pinctrl macros for AM62AX SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Vignesh Raghavendra Acked-by: Linus Walleij --- include/dt-bindings/pinctrl/k3.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index a5204ab91d3e..97cd2e39efa4 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -44,4 +44,6 @@ #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #endif