From patchwork Sun Mar 13 15:29:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 551137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC314C41535 for ; Sun, 13 Mar 2022 15:29:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234823AbiCMPbB (ORCPT ); Sun, 13 Mar 2022 11:31:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52512 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232272AbiCMPbA (ORCPT ); Sun, 13 Mar 2022 11:31:00 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAECA38DA0; Sun, 13 Mar 2022 08:29:50 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id B3589223F7; Sun, 13 Mar 2022 16:29:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1647185388; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tYqLzTM+PgVgCGYTteyksCDNUwqgACT77UqZ07efI+o=; b=Zy4Ng9e/ecPkfNzpfJBpeulUS4CeOf56aROndT7fZp3sMzrO6GnNvmX8gWOnG5O+UeaYYi k4XY4Oeu7wiDnfzmas4SFfywj79CTMi8dmEd7XektPsQ9RAQMer6jx/A2G+rC8um1L77ot aWMFCRJIpKDyf+J31pWItI8yweVZd68= From: Michael Walle To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Thomas Bogendoerfer , Gregory CLEMENT , Paul Burton , Quentin Schulz , Antoine Tenart , Kavyasree Kotagiri , Nicolas Ferre Cc: "David S . Miller" , UNGLinuxDriver@microchip.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Michael Walle Subject: [PATCH v1 3/8] MIPS: mscc: ocelot: fix PHY interrupt pinctrl node name Date: Sun, 13 Mar 2022 16:29:19 +0100 Message-Id: <20220313152924.61931-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220313152924.61931-1-michael@walle.cc> References: <20220313152924.61931-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The pinctrl device tree binding will be converted to YAML format. All the pin nodes should end with "-pins". Fix them. Fixes: 116edf6e5239 ("MIPS: mscc: add DT for Ocelot PCB120") Signed-off-by: Michael Walle --- arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts index 9d6b5717befb..cda6c5ff58ad 100644 --- a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts +++ b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts @@ -22,7 +22,7 @@ memory@0 { }; &gpio { - phy_int_pins: phy_int_pins { + phy_int_pins: phy-int-pins { pins = "GPIO_4"; function = "gpio"; };