From patchwork Tue Mar 8 03:25:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 549894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 731D0C4332F for ; Tue, 8 Mar 2022 03:25:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237924AbiCHD0u (ORCPT ); Mon, 7 Mar 2022 22:26:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239182AbiCHD0s (ORCPT ); Mon, 7 Mar 2022 22:26:48 -0500 Received: from mail-m17661.qiye.163.com (mail-m17661.qiye.163.com [59.111.176.61]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AC98D2B261 for ; Mon, 7 Mar 2022 19:25:52 -0800 (PST) Received: from localhost.localdomain (unknown [58.22.7.114]) by mail-m17661.qiye.163.com (Hmail) with ESMTPA id 853C71DF648; Tue, 8 Mar 2022 11:25:50 +0800 (CST) From: Jianqun Xu To: heiko@sntech.de Cc: linus.walleij@linaro.org, huangtao@rock-chips.com, kever.yang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-gpio@vger.kernel.org, Jianqun Xu Subject: [PATCH 4/4] pinctrl: rockchip: register gpio driver before pinctrl driver Date: Tue, 8 Mar 2022 11:25:46 +0800 Message-Id: <20220308032546.2169929-5-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220308032546.2169929-1-jay.xu@rock-chips.com> References: <20220308032546.2169929-1-jay.xu@rock-chips.com> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUtXWQgPGg8OCBgUHx5ZQUlOS1dZCBgUCR5ZQVlLVUtZV1 kWDxoPAgseWUFZKDYvK1lXWShZQUlKS0tKN1dZLVlBSVdZDwkaFQgSH1lBWUNKGEhWQhhLQkkZHh 4ZQhpIVRMBExYaEhckFA4PWVdZFhoPEhUdFFlBWU9LSFVKSktITUpVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6OU06Fhw6Ij5MLzI9KS8RNDMC OAswCjRVSlVKTU9NTEtCQk5KS0tOVTMWGhIXVREaAlUDDjsJFBgQVhgTEgsIVRgUFkVZV1kSC1lB WU5DVUlJVUxVSkpPWVdZCAFZQUhOSUw3Bg++ X-HM-Tid: 0a7f678fc8f9da2bkuws853c71df648 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This patch should co-work with the gpio-rockchip driver patch, it populates the gpio platform first and add gpio_chip after pinctrl register. Signed-off-by: Jianqun Xu --- drivers/pinctrl/pinctrl-rockchip.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index d8dd8415fa81..4c79df79017a 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2666,6 +2666,13 @@ static int __maybe_unused rockchip_pinctrl_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(rockchip_pinctrl_dev_pm_ops, rockchip_pinctrl_suspend, rockchip_pinctrl_resume); +static int gpiochip_match_name(struct gpio_chip *gc, void *data) +{ + const char *name = data; + + return !strcmp(gc->label, name); +} + static int rockchip_pinctrl_probe(struct platform_device *pdev) { struct rockchip_pinctrl *info; @@ -2674,7 +2681,7 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) struct rockchip_pin_ctrl *ctrl; struct resource *res; void __iomem *base; - int ret; + int ret, i; if (!dev->of_node) return dev_err_probe(dev, -ENODEV, "device tree node not found\n"); @@ -2683,6 +2690,10 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) if (!info) return -ENOMEM; + ret = of_platform_populate(np, NULL, NULL, NULL); + if (ret) + return dev_err_probe(dev, ret, "failed to register gpio device\n"); + info->dev = dev; ctrl = rockchip_pinctrl_get_soc_data(info, pdev); @@ -2733,11 +2744,19 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) if (ret) return ret; - platform_set_drvdata(pdev, info); + for (i = 0; i < ctrl->nr_banks; i++) { + struct gpio_chip *gc; - ret = of_platform_populate(np, NULL, NULL, &pdev->dev); - if (ret) - return dev_err_probe(dev, ret, "failed to register gpio device\n"); + gc = gpiochip_find((void *)ctrl->pin_banks[i].name, gpiochip_match_name); + ret = gpiochip_add_pin_range(gc, dev_name(dev), 0, gc->base, gc->ngpio); + if (ret) { + dev_err(dev, "fail to add pin range\n"); + return ret; + } + } + + platform_set_drvdata(pdev, info); + dev_info(dev, "probed %s\n", dev_name(dev)); return 0; }