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DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Sep 2021 07:31:07.2582 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f1cdb329-8b3c-46e4-2614-08d971d174fc X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.32]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT045.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1632 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: pshete T19x supports 8 entries for GPIO controller. This change adds the required interrupt entires for all GPIO controllers. Signed-off-by: Prathamesh Shete --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 49 +++++++++++++++++++++++- 1 file changed, 47 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index b7d532841390..c681a79c44ec 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -34,11 +34,53 @@ reg = <0x2200000 0x10000>, <0x2210000 0x10000>; interrupts = , + , + , + , + , + , + , + , , + , + , + , + , + , + , + , , + , + , + , + , + , + , + , , + , + , + , + , + , + , + , , - ; + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; #interrupt-cells = <2>; interrupt-controller; #gpio-cells = <2>; @@ -1273,7 +1315,10 @@ reg-names = "security", "gpio"; reg = <0xc2f0000 0x1000>, <0xc2f1000 0x1000>; - interrupts = ; + interrupts = , + , + , + ; gpio-controller; #gpio-cells = <2>; interrupt-controller;