From patchwork Sun Dec 13 08:10:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 343729 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED0F6C2BBD4 for ; Sun, 13 Dec 2020 08:14:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A1B9E22DA7 for ; Sun, 13 Dec 2020 08:14:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404320AbgLMIOR (ORCPT ); Sun, 13 Dec 2020 03:14:17 -0500 Received: from esa1.hgst.iphmx.com ([68.232.141.245]:32104 "EHLO esa1.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2404178AbgLMIOO (ORCPT ); Sun, 13 Dec 2020 03:14:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1607847253; x=1639383253; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pv8JZtQB/72JVAORh2Chi7j0O6QOFyYxn8e6KGe0E38=; b=ny39BCXgWJaKGfefcUp5D5cgH3tu7HrPCnnY7s9qDQvSkxMZLso5jbr4 q5ajjlOxRF4WTg8YSque4ryjTQGA20rzR46D0vTHtZI/a3WvheCdnkiQx Y9mrm8W7jmIjXfanslvoSor2UCOpLoyOwmnu2EiL2l7WK6DVOaFVhkyKR 0PdxVxhl34jeqpZvNqPZMP8zUaCpvzZskUWfF4gA8Z3AKPixJA90WAOzY mDU+XnhN5msxvu6DTj0IcC0El7dl/AV1rzS/FcMUpfXzv/ioIpU/1KgXr AEcyLCi31r1nVXtRzgT4URNf73xpfHEViF53Mxch/c+aqMrwX6A7b3eNg A==; IronPort-SDR: 5WNVnR1p/byLltl9fb7DbVd5hb/axG5xGNcdOoo1KJu3VhdeV0jqGnEc1nW93ebI9Zh3ecvGSu MKTYHlE1SJOvN2PFy8uydlvNn8hp0C68RK/Xq5oPiaGdGWGchFyREcj1wqBweVIiCF/NTtnstA RT+fgCZH/jqHSYwYCIk2ubu2iLAZBtWHGkF+rpHsk0ywlQ7OgeFk5pjnF8dOBMTY5w5h0Tbh+D ZCYX1OCfvCdBq7PnorpX5p0Tg8isD1hN+QNhL4ofUohSL+Af6zqbwQRftIiRBcfZW+zEzM8R8i qS4= X-IronPort-AV: E=Sophos;i="5.78,415,1599494400"; d="scan'208";a="265208212" Received: from uls-op-cesaip01.wdc.com (HELO uls-op-cesaep01.wdc.com) ([199.255.45.14]) by ob1.hgst.iphmx.com with ESMTP; 13 Dec 2020 16:10:53 +0800 IronPort-SDR: aCU04FmrIWU96RjXzAl89SawdOOtKM7/w1zPztYgwPRGd4C+XAlFLwncgwQ+HA/uO0BSLOqwS1 dp1IWvRsMyz17J5H019IWG94R2OPjjal14HVSiOfbaRoq0p1x56mMRG88WtYuqtRW6TRMjF/Bd cMxszC7j+7cbkN8PmsG7J+kBMi45rqFtZXUYzG4H6X8UrIIVL1DSVWPX/tDArQQPWtJZPeLsum REuLTVzqnoPjYFwz3BeEkPYsNH4qz7j2I31X7lqAngeJFd82RzJbcwVot+u/oIlaKXb7mkKrB/ 15/h6FcEjF3PoQgfoNx8Usf7 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep01.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Dec 2020 23:56:14 -0800 IronPort-SDR: pDEfy5XK+0bTMCI42ULlWJVQNFr7XJRsobGvnN/0vKz9xY2BuVtayr+V9rESJc2V5tlasKqZMy /E0dWJCpmkhTz1rv+wmtwWHjtmSQIN5kL2W6++Knvt/kNEwnZDNzcuIN7bU//ppwKN8RWn9l9e hMZOvfCaG6EQN2R1IML4rgy9BktoqS3ZlxCx+Z3klN9VCmYXaBOxCpv32DvKzG7Wa8u/yC0iRl ugq1JHHTfwmpmYC0CmwpT1QjKFslkdI5dOVz9JPDgwcqLAd398GO4Nb/YUf0LuAiHvPQ7g3JOd cW8= WDCIronportException: Internal Received: from phd004806.ad.shared (HELO twashi.fujisawa.hgst.com) ([10.84.71.197]) by uls-op-cesaip02.wdc.com with ESMTP; 13 Dec 2020 00:10:52 -0800 From: Damien Le Moal To: Palmer Dabbelt , linux-riscv@lists.infradead.org, Rob Herring , devicetree@vger.kernel.org, Stephen Boyd , linux-clk@vger.kernel.org, Linus Walleij , linux-gpio@vger.kernel.org, Philipp Zabel Cc: Sean Anderson Subject: [PATCH v9 16/22] riscv: Add SiPeed MAIX BiT board device tree Date: Sun, 13 Dec 2020 17:10:10 +0900 Message-Id: <20201213081016.179192-17-damien.lemoal@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201213081016.179192-1-damien.lemoal@wdc.com> References: <20201213081016.179192-1-damien.lemoal@wdc.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add a device tree for the SiPeed MAIX BiT and MAIX BiTm boards. This device tree enables LEDs, gpio, i2c and spi/mmc SD card devices. Signed-off-by: Damien Le Moal --- arch/riscv/boot/dts/canaan/k210_maix_bit.dts | 227 +++++++++++++++++++ 1 file changed, 227 insertions(+) create mode 100644 arch/riscv/boot/dts/canaan/k210_maix_bit.dts diff --git a/arch/riscv/boot/dts/canaan/k210_maix_bit.dts b/arch/riscv/boot/dts/canaan/k210_maix_bit.dts new file mode 100644 index 000000000000..a5a40f9cf812 --- /dev/null +++ b/arch/riscv/boot/dts/canaan/k210_maix_bit.dts @@ -0,0 +1,227 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019-20 Sean Anderson + * Copyright (C) 2020 Western Digital Corporation or its affiliates. + */ + +/dts-v1/; + +#include "k210.dtsi" + +#include +#include + +/ { + model = "SiPeed MAIX BiT"; + compatible = "sipeed,maix-bitm", "sipeed,maix-bit", + "canaan,kendryte-k210"; + + chosen { + bootargs = "earlycon console=ttySIF0"; + stdout-path = "serial0:115200n8"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + green { + gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>; + }; + + red { + gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>; + }; + + blue { + gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + boot { + label = "BOOT"; + linux,code = ; + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; + }; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + status = "disabled"; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + }; + + simple-audio-card,codec { + sound-dai = <&mic>; + }; + }; + + mic: mic { + #sound-dai-cells = <0>; + compatible = "memsensing,msm261s4030h0"; + status = "disabled"; + }; +}; + +&fpioa { + pinctrl-names = "default"; + pinctrl-0 = <&jtag_pinctrl>; + status = "okay"; + + jtag_pinctrl: jtag-pinmux { + pinmux = , + , + , + ; + }; + + uarths_pinctrl: uarths-pinmux { + pinmux = , + ; + }; + + gpio_pinctrl: gpio-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + gpiohs_pinctrl: gpiohs-pinmux { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + + i2s0_pinctrl: i2s0-pinmux { + pinmux = , + , + ; + }; + + dvp_pinctrl: dvp-pinmux { + pinmux = , + , + , + , + , + , + , + ; + }; + + spi0_pinctrl: spi0-pinmux { + pinmux = , /* cs */ + , /* rst */ + , /* dc */ + ; /* wr */ + }; + + spi1_pinctrl: spi1-pinmux { + pinmux = , + , + , + ; /* cs */ + }; + + i2c1_pinctrl: i2c1-pinmux { + pinmux = , + ; + }; +}; + +&uarths0 { + pinctrl-0 = <&uarths_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio0 { + pinctrl-0 = <&gpiohs_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&gpio1 { + pinctrl-0 = <&gpio_pinctrl>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2s0 { + #sound-dai-cells = <1>; + pinctrl-0 = <&i2s0_pinctrl>; + pinctrl-names = "default"; +}; + +&i2c1 { + pinctrl-0 = <&i2c1_pinctrl>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; +}; + +&dvp0 { + pinctrl-0 = <&dvp_pinctrl>; + pinctrl-names = "default"; +}; + +&spi0 { + pinctrl-0 = <&spi0_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + + panel@0 { + compatible = "sitronix,st7789v"; + reg = <0>; + reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; + dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; + spi-max-frequency = <15000000>; + spi-cs-high; + status = "disabled"; + }; +}; + +&spi1 { + pinctrl-0 = <&spi1_pinctrl>; + pinctrl-names = "default"; + num-cs = <1>; + cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + status = "okay"; + + slot@0 { + compatible = "mmc-spi-slot"; + reg = <0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <25000000>; + broken-cd; + }; +}; + +&spi3 { + spi-flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + m25p,fast-read; + broken-flash-reset; + }; +};