From patchwork Fri Sep 13 11:35:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 173751 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:ce:0:0:0:0 with SMTP id r14csp37936ilq; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqy6AomLcG26k0WKil9ayeR4Ha829EiAZnSpUSh3KRMJi9obmoIGEpKdDNcPRx3CtelM7n1B X-Received: by 2002:a05:6402:1845:: with SMTP id v5mr41705076edy.130.1568374541828; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568374541; cv=none; d=google.com; s=arc-20160816; b=tYtQ8/YuAHJoOAxQu00hkaNzXcFviUYvDezMq0Ivh1rIvB/NZslBtxBsruQVIK64Da LJ6jqmigisEBHlPn/xFZL6gc0cm1pqoNn35rV/3QeDPaApBqzM3QSr0WwL90juVi+Gwr kfdSvFxJ4GBjChF1C6wKcGwnMDdwZXFRfO+T9cgpvmwWKnTICKcHj0WUq0ctcM/8iAU5 IYQx9kP97Ag/IP7uuq1PAzFbFQo+MM3g27pq4w1hwlv1oSb3gkOA48EWTNGNT2mdjGOf siDBhfDXR6OSxuS4tfmFjpIsJc50ePqeTaa1rbK8mZy7uFlrWsOsVW+ehx3PyLxdWQr9 MFaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=XxmY4f1RQi74zXyerk/mcobxBi1tw34QoigTbNp/Les=; b=HJbyJrVTUewkrWQOdJmk/w0QgcNThJBpfxmMKDD4OB9SRvbCk0A0+R+MoSJLv7I7bd W86oQjUKqKxH3tg4H+KOvKdGpSG2DK3vqJI3GtwVT1kdmNBnqq/ZAAV92x0zzI5Qxj5F q28dRmUmln74afA7wPrz9n1rXKayS4EvYu4vDvnLP9wyb5kricJFNEhAQFfRo4lXkFSt gXGIoAy1zcr+HN8L7ml8S0OZNho53CoYf81daRoU69KX2xwAJjNtLG3PYdAVXI3iqgWK VkNwkmsyEjHoEP6aSNVnZDtEGkc6txpc9fUtEwwFQNa4NrqY9fty73URFo7h8Vs4Uqpm iZlg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gUggQK5Z; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v5si17870968edm.313.2019.09.13.04.35.41; Fri, 13 Sep 2019 04:35:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gUggQK5Z; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727848AbfIMLfl (ORCPT + 5 others); Fri, 13 Sep 2019 07:35:41 -0400 Received: from mail-lf1-f66.google.com ([209.85.167.66]:33166 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbfIMLfl (ORCPT ); Fri, 13 Sep 2019 07:35:41 -0400 Received: by mail-lf1-f66.google.com with SMTP id d10so21863378lfi.0 for ; Fri, 13 Sep 2019 04:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XxmY4f1RQi74zXyerk/mcobxBi1tw34QoigTbNp/Les=; b=gUggQK5Z9FaO57HcFWvFxo21GsklUZRbC4F+d3IkQeVwRUppCxRSkWuAdnqc/ADknw 1aMT5MhJ0OREevh1CqRsvkAd4CkNWqwdfWdAeEK1wxFrSf4IWK+IrpK+aZmuw/R6tT89 XcA3pKq2xRa9ZerAH4cSNQBU77k+OGhJ6HM7u8brhi5Ut/39b1dddQq43npHB94fXyKN fjrpWrEXYu93sj7vouZHdYY9imA9aYfF+vEv9bewiP5jupqAiyqTx1sMTRSnYphy02KF OK5Yg8sJMtqQPeNJI52VdqfWJztts+DyR9a8Hkf+ybJe7W2n5TGeVugYLOFBvJJASQHM gKlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XxmY4f1RQi74zXyerk/mcobxBi1tw34QoigTbNp/Les=; b=NWV4vJrK+5fw7zsMHl7tqitkhrIzeAkL1l1mCw12GJY5Ilf3I9hMAnUVJIcxNuo6E8 JllFkJzRUyJRi2ZT8VcuB1kuHELkyoNE/ZuIabNhFcWz5JC3yVECGMiAGEhLuyzUwVks YQUsazC0CdQS+7kGsItyPtBcbboLhIhhz/mAke23U4zIRk2CezyFa/FpiRlxAcn5wV7X 7PfISrMUATBK5OlBa/RMMWH0kVVrogAPWUluGj/ZRtAyry7SqqcP7hRi60MxER93RctT m+4sdB8Qj5t9O3YPNK/W25tRLVXwirIX2PifwMLl6CHe4pVKoX+YHP4QI+cHlrkOA6j6 uEbQ== X-Gm-Message-State: APjAAAU6u1Gv7JhpWb+nfHWQBDhdNRx1kYDAPmm4Dazh3EQP6Bki+xc7 Z0RldjiBjdwy5xkEfTndkCjeNEF79vH95MFT X-Received: by 2002:ac2:47e3:: with SMTP id b3mr29486787lfp.80.1568374538928; Fri, 13 Sep 2019 04:35:38 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v17sm6177440ljh.8.2019.09.13.04.35.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Sep 2019 04:35:37 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Joshua Henderson , Thierry Reding Subject: [PATCH 2/6] pinctrl: pic32: Pass irqchip when adding gpiochip Date: Fri, 13 Sep 2019 13:35:26 +0200 Message-Id: <20190913113530.5536-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190913113530.5536-1-linus.walleij@linaro.org> References: <20190913113530.5536-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Joshua Henderson Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-pic32.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) -- 2.21.0 diff --git a/drivers/pinctrl/pinctrl-pic32.c b/drivers/pinctrl/pinctrl-pic32.c index e7f6dd5ab578..7e4c5a08a932 100644 --- a/drivers/pinctrl/pinctrl-pic32.c +++ b/drivers/pinctrl/pinctrl-pic32.c @@ -2203,6 +2203,7 @@ static int pic32_gpio_probe(struct platform_device *pdev) u32 id; int irq, ret; struct resource *res; + struct gpio_irq_chip *girq; if (of_property_read_u32(np, "microchip,gpio-bank", &id)) { dev_err(&pdev->dev, "microchip,gpio-bank property not found\n"); @@ -2240,25 +2241,23 @@ static int pic32_gpio_probe(struct platform_device *pdev) bank->gpio_chip.parent = &pdev->dev; bank->gpio_chip.of_node = np; + girq = &bank->gpio_chip.irq; + girq->chip = &bank->irq_chip; + girq->parent_handler = pic32_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; + girq->parents[0] = irq; ret = gpiochip_add_data(&bank->gpio_chip, bank); if (ret < 0) { dev_err(&pdev->dev, "Failed to add GPIO chip %u: %d\n", id, ret); return ret; } - - ret = gpiochip_irqchip_add(&bank->gpio_chip, &bank->irq_chip, - 0, handle_level_irq, IRQ_TYPE_NONE); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to add IRQ chip %u: %d\n", - id, ret); - gpiochip_remove(&bank->gpio_chip); - return ret; - } - - gpiochip_set_chained_irqchip(&bank->gpio_chip, &bank->irq_chip, - irq, pic32_gpio_irq_handler); - return 0; }