From patchwork Wed Jul 24 08:38:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 169604 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp9963803ilk; Wed, 24 Jul 2019 01:38:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwE3Ksi1Kofu1vpqehlZvJLAyITENkYAmbtG2ViAfYDTmw/VHhu5zKDLDLWhozPB7T5RrpK X-Received: by 2002:a62:b615:: with SMTP id j21mr9884936pff.190.1563957514520; Wed, 24 Jul 2019 01:38:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563957514; cv=none; d=google.com; s=arc-20160816; b=IjZYj0/PYtjS2FJ9m3jK/fm/Ik8ISUy6d3g1vj9LujGl1TvF7hDZRV5WL/6gKEo1oa EZArfRHLzcYUu4e0IxRo5xpwusU9/q2q4aLGQOgjKz2MUbI0EPvTAZ/Yx//8GB3LnFHx Aq2mHhAv5MwCzwIYigvDUR4w0JG1KYLd9rtIK1x4RrGUGg+7gYj1+P3nYjdvSaaf1rhH gEmMNGhNAHBmUybFu3k2g7XYw/DZAnazGmdKCneV1EnCiUiK5KyZUkk4/rhGx1+Ae2VA YaDFDHtqttbO+wYMJgpzGnhbtmi/k9Dj8msihlaL5714Mxml3SrwCtKYsykHhx0/C67X m37Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=DCCUYWwiF/FmuCeEm8HO/gSdjjzr9bdL/IKHo1jATvU=; b=zcCwh/ZplAo39XMzyGId4GiXzizBwU0R4pA1QoB4U6bRulC3C5DzxK50A6R9TUam17 NLf2mlBcDYXVi5VMFimpAblLxlERuWqVxR2sD0K7YagcZJuvtyhdf2wRyImGSrcK8s3k gC/Vtdh/Ae3owsZqHhFwlEETAyQ6Ym70jUUgfB2zPB5g2i5smBfJA+JDjYbLE8WgK4Ar uMZGe8YrTfEIVVn36DnZEWqYhHwQEDNjaNr2MZ4gA7QMXyoB1fCHgZrTQBFeSV07te+4 V5t8HUcNYoWX2UpU4aIrzAVFzHTNd+EsmnQjKiR/7EfpoZcnYUrzJlP8orAnvTWhHK9J fsuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MWeqbL4Z; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k192si16669611pge.222.2019.07.24.01.38.34; Wed, 24 Jul 2019 01:38:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MWeqbL4Z; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726065AbfGXIie (ORCPT + 5 others); Wed, 24 Jul 2019 04:38:34 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:36850 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726031AbfGXIid (ORCPT ); Wed, 24 Jul 2019 04:38:33 -0400 Received: by mail-lj1-f194.google.com with SMTP id i21so43715600ljj.3 for ; Wed, 24 Jul 2019 01:38:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=DCCUYWwiF/FmuCeEm8HO/gSdjjzr9bdL/IKHo1jATvU=; b=MWeqbL4ZpTWYDt8YOy0r1IbWEt4BCQKFjsZfafJ8O89MNIQp2Ib7AMR6wN8rsIWcPS wY9fNgwKvOjK5EVGl2GIk8eSxPu6DKtt+t5SHv+JGnRBT9nr9yeyiQcq2kpiMP2RPMA6 vMXuPsyyqJWq/8GAQ6OX51G201/LYDOjeX95CusHGYFLMpOkwwlGh6O32P/8WOUh/rSv xvxoLFWjcf7OJFFr3ukztNlSgRLdThcImiQdoWqjzXAYC1bH6EANNHdd2lqvqeeLEgos bY3INh2k5kSTOqkMDhNiRoBvxt8W0f1ZNm9/S2UbCTmsnnjhTydK2z0iyU5SK0sURjUR R/XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=DCCUYWwiF/FmuCeEm8HO/gSdjjzr9bdL/IKHo1jATvU=; b=XHCpWGiRD7Jt0WCxWpbjVBuOq9MIUE4ryBlbD6dL8SSdhqOCDMwPqlaxq0D5Zs/tLh RfzWijwQd1IKqHiQW3HiE6w9jhSrgR9pUk7Qk2lnvLtT4BdHBd1Q7LO3lhLZ+TRB8/Zc YU7hjPiTXX2kgO9jM0ZoR2fsIhV6ZbPocNqcyQeEmYJoaFHfYyt0VdqrXioq+anaNlsI cxvKYLU9Ol0EzHP/fJ86xF9ygjiD1dnadDvM7Lx9xBhXwXWUQtcpLrnUIPy8vZfEpHlk k4dzezZJWsNjbGm/pVNiEJnyxGNYEshFqAPV+nj1Un9AAVyd+jwQ65gCUGRgHzbeCTgZ w2og== X-Gm-Message-State: APjAAAU+9PMYBkWn8NCkUmWXVxklzuPATPPcLTL/5J6aYaHdS/YHNb94 gK7aUkLqvhAxDFyjH+0m92OunD3XoyY= X-Received: by 2002:a2e:9b10:: with SMTP id u16mr642957lji.231.1563957511516; Wed, 24 Jul 2019 01:38:31 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id c19sm6869512lfi.39.2019.07.24.01.38.30 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 24 Jul 2019 01:38:30 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Bjorn Andersson , Thierry Reding Subject: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip Date: Wed, 24 Jul 2019 10:38:28 +0200 Message-Id: <20190724083828.7496-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For chained irqchips this is a pretty straight-forward conversion. Cc: Bjorn Andersson Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/pinctrl/qcom/pinctrl-msm.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) -- 2.21.0 Reviewed-by: Bjorn Andersson diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 7f35c196bb3e..73062e329f6f 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1002,6 +1002,7 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) static int msm_gpio_init(struct msm_pinctrl *pctrl) { struct gpio_chip *chip; + struct gpio_irq_chip *girq; int ret; unsigned ngpio = pctrl->soc->ngpios; @@ -1027,6 +1028,18 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres; pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; + girq = &chip->irq; + girq->chip = &pctrl->irq_chip; + girq->parent_handler = msm_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(pctrl->dev, 1, sizeof(*girq->parents), + GFP_KERNEL); + if (!girq->parents) + return -ENOMEM; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_bad_irq; + girq->parents[0] = pctrl->irq; + ret = gpiochip_add_data(&pctrl->chip, pctrl); if (ret) { dev_err(pctrl->dev, "Failed register gpiochip\n"); @@ -1053,20 +1066,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) } } - ret = gpiochip_irqchip_add(chip, - &pctrl->irq_chip, - 0, - handle_edge_irq, - IRQ_TYPE_NONE); - if (ret) { - dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n"); - gpiochip_remove(&pctrl->chip); - return -ENOSYS; - } - - gpiochip_set_chained_irqchip(chip, &pctrl->irq_chip, pctrl->irq, - msm_gpio_irq_handler); - return 0; }