From patchwork Tue Sep 25 19:14:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 147521 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp1090357lji; Tue, 25 Sep 2018 12:14:57 -0700 (PDT) X-Google-Smtp-Source: ACcGV61kQM+RGEJJE5TxvLp7H+cF8rQIltJ33WFTHOCsAfzgHQx4R9NBOYUusHRNXvHK8FtwlhsJ X-Received: by 2002:a17:902:7009:: with SMTP id y9-v6mr2467728plk.328.1537902897612; Tue, 25 Sep 2018 12:14:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537902897; cv=none; d=google.com; s=arc-20160816; b=TWeZwyWCpxcLyD3WO3QvmOv2MdZ1N/E9BS1kRQpWFgeTP7kaL+PTPRRXmjdaR5yo5w Z4IBojgNVHJidbkd5M+0lBGf+MN3ElfZLQ9g0J5MxKlUaeJSZQ/YuyBnUF/pmpy61QMz 7K8DPVaLvUA985nxPcOhM9zyKQdvrmEDFQDFJsfQWCXDgpopr/4SKKZYR0EEgELnQFLk jD5BD5VgH8dICAI56it7/dvJoxCljWOVXzxmlt2dTii12tn717vWlL65gAaQ6yEqqJcX I4CXLGm/XbgFbarqQtksy9Yz2ghhTnZ9AZ4wfcHI/LfTYMPQkGuRnyDgVeRqCCPbUX50 FQBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=s11WQKrrbYEJdR2CgMtTdlBi/rq+mjESuMJAzWZEGBw=; b=v7Cintw1dd0yWoduKmagYnSxjJgFg8h+QkcEWoZtW/setkxpGkTMh5Yoevnygrb4lu bdRZZGcEdntacg+1J1LJur3np10z7odXbchgFLpsz17QWV3ig4hAJTNZ+sAoRJZJEF73 YC0Vs6IcFT7sVJNJJ7LzI/qcG38n4fJjDlKIuyoY/guscbYYDis+LGvwh6fKg6jAL6nb mUP+T87YQXN81Q1HF4yp+PG+8qSkSvq9wHgAUXl2Uq45r3dpHV1Oe8lxhesfF7x7Z52K N3o0FD2Pb3PrUq59C2D994hLu6MEqo/mZOl5TKTNA0h8vibsvSrVu8+Xr0+c6lCJCdCD 8cBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TImCr9U1; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b13-v6si2809653pgw.604.2018.09.25.12.14.57; Tue, 25 Sep 2018 12:14:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TImCr9U1; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727516AbeIZBX4 (ORCPT + 5 others); Tue, 25 Sep 2018 21:23:56 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:47938 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727354AbeIZBX4 (ORCPT ); Tue, 25 Sep 2018 21:23:56 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w8PJEmHs065025; Tue, 25 Sep 2018 14:14:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1537902888; bh=s11WQKrrbYEJdR2CgMtTdlBi/rq+mjESuMJAzWZEGBw=; h=From:To:CC:Subject:Date; b=TImCr9U1A1mTPiiBvyUoRv4AXg0brAHMGoYG63j53N3hsqSqvPHNrOhuFO8yP9X/0 CV6cZRvmlNJs0d7ZfKCYN1pr7WJQSs0SxRfKl4kQPcOn71i605Nx4fMJ3qygpJTQS0 fHlXN6CSaQ2NowZUIUe1m5GCX7kuDap153XFur64= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8PJEmVt000899; Tue, 25 Sep 2018 14:14:48 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 25 Sep 2018 14:14:47 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Tue, 25 Sep 2018 14:14:48 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8PJEliJ004157; Tue, 25 Sep 2018 14:14:47 -0500 Received: from localhost (uda0226610.dhcp.ti.com [128.247.59.147]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id w8PJElx12410; Tue, 25 Sep 2018 14:14:47 -0500 (CDT) From: Grygorii Strashko To: Linus Walleij , Tony Lindgren CC: , , , Grygorii Strashko Subject: [PATCH] gpio: omap: switch to use irq_chip pm runtime Date: Tue, 25 Sep 2018 14:14:46 -0500 Message-ID: <20180925191446.31504-1-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.10.5 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The PM runtime management can be delegated from OMAP GPIO driver to the IRQ chip core, since commit be45beb2df69 ("genirq: Add runtime power management support for IRQ chips") introduces runtime power management support for IRQ chips. Hence, drop custom PM runtime support for OMAP GPIO IRQs and switch to IRQ chip core PM runtime (set irq_chip->parent_device). Signed-off-by: Grygorii Strashko --- Based on: "[PATCHv2 0/3] omap gpio add level idle, cpu_pm and drop runtime_irq_safe" https://www.spinics.net/lists/arm-kernel/msg677583.html drivers/gpio/gpio-omap.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) -- 2.10.5 diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index c0d7ae7..f292796 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -860,26 +860,6 @@ static void omap_gpio_irq_shutdown(struct irq_data *d) raw_spin_unlock_irqrestore(&bank->lock, flags); } -static void omap_gpio_irq_bus_lock(struct irq_data *data) -{ - struct gpio_bank *bank = omap_irq_data_get_bank(data); - - if (!BANK_USED(bank)) - pm_runtime_get_sync(bank->chip.parent); -} - -static void gpio_irq_bus_sync_unlock(struct irq_data *data) -{ - struct gpio_bank *bank = omap_irq_data_get_bank(data); - - /* - * If this is the last IRQ to be freed in the bank, - * disable the bank module. - */ - if (!BANK_USED(bank)) - pm_runtime_put(bank->chip.parent); -} - static void omap_gpio_ack_irq(struct irq_data *d) { struct gpio_bank *bank = omap_irq_data_get_bank(d); @@ -1383,10 +1363,9 @@ static int omap_gpio_probe(struct platform_device *pdev) irqc->irq_unmask = omap_gpio_unmask_irq, irqc->irq_set_type = omap_gpio_irq_type, irqc->irq_set_wake = omap_gpio_wake_enable, - irqc->irq_bus_lock = omap_gpio_irq_bus_lock, - irqc->irq_bus_sync_unlock = gpio_irq_bus_sync_unlock, irqc->name = dev_name(&pdev->dev); irqc->flags = IRQCHIP_MASK_ON_SUSPEND; + irqc->parent_device = dev; bank->irq = platform_get_irq(pdev, 0); if (bank->irq <= 0) {