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[209.132.180.67]) by mx.google.com with ESMTP id x69-v6si744059pfe.318.2018.09.12.04.32.21; Wed, 12 Sep 2018 04:32:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HrD+V0Es; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726672AbeILQg2 (ORCPT + 5 others); Wed, 12 Sep 2018 12:36:28 -0400 Received: from mail-lj1-f193.google.com ([209.85.208.193]:39706 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726606AbeILQg1 (ORCPT ); Wed, 12 Sep 2018 12:36:27 -0400 Received: by mail-lj1-f193.google.com with SMTP id l15-v6so1307697lji.6 for ; Wed, 12 Sep 2018 04:32:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WmDKNuVL2nQEOx4lnKKMauhr7amwXHX432D2ciaX0bw=; b=HrD+V0EsTf+MrjTIH4eYswSpyPOL7PSO08bFHpYQVdrzZ1PORD4B6NmdS0uXwm0MRO ahzgswREMBpiDcO9d6xjUleZSNRHYPy/g+wo7xaEprCb/HSS0y07tgEJlWYYyVCURDWE VdR+6pjuO6H5eC7iTaB/T9/8vfqwKqRDJFcpU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WmDKNuVL2nQEOx4lnKKMauhr7amwXHX432D2ciaX0bw=; b=IBh+aYT/ofkP9qWqp0gTf82OCNkySHMuLdkS1m1IZ/c3vkf7NaKxhD8R3ifTu9f6bo MsLJv4KGbl2yerczBMR1TCgLqdxBkcd/zHkieszITNcw0gBkJFTcPC2zffmgfSvZdsyg IwsAgncwQJeVVR+F4mHeY5qp65GmU9P4tHvRMVyt/Zu3ehOglJVzFv1ZNgEe33BiLBQN gdUqFpXu7B45tNRWALR4FAA2aYSh+LEL6/NQXAQHbvxA8XohjY4kzi2VJVgQ1nh2h5t3 pAwoLOVKdox+3423tYyvThpgqMtXMFQ40rHKgAAKQWcJhp39hdQdKozeq+D6CX+eCLxo xN5Q== X-Gm-Message-State: APzg51C8Jo3uov9mTDDJ3y3NlRrL5abzPO1ZNrmLXttoGzzUAtdmm/Ev yxg4pTiS0Th0axYHL+0Zh9g1SH6pwBdkxg== X-Received: by 2002:a2e:85d5:: with SMTP id h21-v6mr1090903ljj.103.1536751938551; Wed, 12 Sep 2018 04:32:18 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id q19-v6sm144182lje.29.2018.09.12.04.32.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 12 Sep 2018 04:32:17 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org, Linus Walleij , Yoichi Yuasa , Ralf Baechle Subject: [PATCH 3/3] gpio: vr41xx: Delete vr41xx_gpio_pullupdown() callback Date: Wed, 12 Sep 2018 13:32:04 +0200 Message-Id: <20180912113204.1064-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180912113204.1064-1-linus.walleij@linaro.org> References: <20180912113204.1064-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This API is not used anywhere in the kernel and has remained unused for years after being introduced. Over time, we have developed a subsystem to deal with pin control and this now managed pull up/down. Delete the old and unused API. If this platform needs it, we should implement a proper pin controller for it instead. Cc: Yoichi Yuasa Cc: Ralf Baechle Signed-off-by: Linus Walleij --- arch/mips/include/asm/vr41xx/giu.h | 8 ------- drivers/gpio/gpio-vr41xx.c | 38 ------------------------------ 2 files changed, 46 deletions(-) -- 2.17.1 diff --git a/arch/mips/include/asm/vr41xx/giu.h b/arch/mips/include/asm/vr41xx/giu.h index 6a90bc1d916b..ecda4cf300de 100644 --- a/arch/mips/include/asm/vr41xx/giu.h +++ b/arch/mips/include/asm/vr41xx/giu.h @@ -51,12 +51,4 @@ typedef enum { extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level); -typedef enum { - GPIO_PULL_DOWN, - GPIO_PULL_UP, - GPIO_PULL_DISABLE, -} gpio_pull_t; - -extern int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull); - #endif /* __NEC_VR41XX_GIU_H */ diff --git a/drivers/gpio/gpio-vr41xx.c b/drivers/gpio/gpio-vr41xx.c index 7d40104b8586..b13a49c89cc1 100644 --- a/drivers/gpio/gpio-vr41xx.c +++ b/drivers/gpio/gpio-vr41xx.c @@ -371,44 +371,6 @@ static int giu_set_direction(struct gpio_chip *chip, unsigned pin, int dir) return 0; } -int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull) -{ - u16 reg, mask; - unsigned long flags; - - if ((giu_flags & GPIO_HAS_PULLUPDOWN_IO) != GPIO_HAS_PULLUPDOWN_IO) - return -EPERM; - - if (pin >= 15) - return -EINVAL; - - mask = 1 << pin; - - spin_lock_irqsave(&giu_lock, flags); - - if (pull == GPIO_PULL_UP || pull == GPIO_PULL_DOWN) { - reg = giu_read(GIUTERMUPDN); - if (pull == GPIO_PULL_UP) - reg |= mask; - else - reg &= ~mask; - giu_write(GIUTERMUPDN, reg); - - reg = giu_read(GIUUSEUPDN); - reg |= mask; - giu_write(GIUUSEUPDN, reg); - } else { - reg = giu_read(GIUUSEUPDN); - reg &= ~mask; - giu_write(GIUUSEUPDN, reg); - } - - spin_unlock_irqrestore(&giu_lock, flags); - - return 0; -} -EXPORT_SYMBOL_GPL(vr41xx_gpio_pullupdown); - static int vr41xx_gpio_get(struct gpio_chip *chip, unsigned pin) { u16 reg, mask;