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[209.132.180.67]) by mx.google.com with ESMTP id u2-v6si398613pge.585.2018.06.28.23.36.15; Thu, 28 Jun 2018 23:36:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=fmkqOJP6; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753235AbeF2GgO (ORCPT + 5 others); Fri, 29 Jun 2018 02:36:14 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:44389 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752967AbeF2GgO (ORCPT ); Fri, 29 Jun 2018 02:36:14 -0400 Received: by mail-lf0-f67.google.com with SMTP id j26-v6so5977205lfb.11 for ; Thu, 28 Jun 2018 23:36:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ow/Eb9FQV+a/OCExCZ8x62pIhWOiVF0L5RzX9Hxu+d4=; b=fmkqOJP6m5JRboqOYef4UeMT7jKra3NW92/5JOrrNfDzorfoAmH+ihPT2NFAxddl6G 9CQS0Je8s3e1Dep2AbzyPNs4fkcMcByXvQ4VvErUHp9DSsB70L0Kzvtdzv9BQTxQYrdy 9tsjAtklzws199X5CgxWMwgMTMKfooPGPXodw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ow/Eb9FQV+a/OCExCZ8x62pIhWOiVF0L5RzX9Hxu+d4=; b=RKrQqn4gGCLVz6IA+bUwhUt7358VcdRPG0ueKyJQD2ry8QcuMcIjMnzsFm/Xs60XRj bTzb4pOhgZ4/9uPexF7O6espfYyVQNpx9DLyBzbNDG7oM1Ls+3GVOCwKAubC/4TDQz/O o5pYjGapVxJq5R6bsT5CjWw/x9iZGRCJp/WR2KEX4BndSwNgwL0B4yQCWJ5960IUwTJS msg6K0y8SFjXqIFyDqbtBXv1MqGgFUy9E/79/2EK7bcLzqHhzIObwk8eBVVjbAeCr0He /+o4B4z+xUtd3cqgkQqRjAHZ8PltIuFo4xZJ6R31w+kTWfnH4CEa2hnLLLR+c4ifniGF tZWA== X-Gm-Message-State: APt69E0ddI1HBjbR2OtDsDUfbmL2A+VQya09b+eqECYxcE+rMYJBxjYf 32sirsjBJ0pY16Qvw4ofd/ctG0UEFeg= X-Received: by 2002:a19:5d54:: with SMTP id p20-v6mr8558986lfj.143.1530254172769; Thu, 28 Jun 2018 23:36:12 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id v2-v6sm1382162ljj.71.2018.06.28.23.36.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Jun 2018 23:36:11 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Bruno Randolf Subject: [PATCH 11/18] gpio: sch311x: Replace unsigned char with u8 Date: Fri, 29 Jun 2018 08:35:37 +0200 Message-Id: <20180629063544.3826-11-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180629063544.3826-1-linus.walleij@linaro.org> References: <20180629063544.3826-1-linus.walleij@linaro.org> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This purely syntactic change switches unsigned char to u8 in the driver. Cc: Bruno Randolf Signed-off-by: Linus Walleij --- drivers/gpio/gpio-sch311x.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) -- 2.17.0 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/gpio/gpio-sch311x.c b/drivers/gpio/gpio-sch311x.c index 1d2af9f97a91..5497f0a88cf0 100644 --- a/drivers/gpio/gpio-sch311x.c +++ b/drivers/gpio/gpio-sch311x.c @@ -162,7 +162,7 @@ static void sch311x_gpio_free(struct gpio_chip *chip, unsigned offset) static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset) { struct sch311x_gpio_block *block = gpiochip_get_data(chip); - unsigned char data; + u8 data; spin_lock(&block->lock); data = inb(block->runtime_reg + block->data_reg); @@ -174,7 +174,7 @@ static int sch311x_gpio_get(struct gpio_chip *chip, unsigned offset) static void __sch311x_gpio_set(struct sch311x_gpio_block *block, unsigned offset, int value) { - unsigned char data = inb(block->runtime_reg + block->data_reg); + u8 data = inb(block->runtime_reg + block->data_reg); if (value) data |= BIT(offset); else @@ -195,7 +195,7 @@ static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset, static int sch311x_gpio_direction_in(struct gpio_chip *chip, unsigned offset) { struct sch311x_gpio_block *block = gpiochip_get_data(chip); - unsigned char data; + u8 data; spin_lock(&block->lock); data = inb(block->runtime_reg + block->config_regs[offset]); @@ -210,7 +210,7 @@ static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) { struct sch311x_gpio_block *block = gpiochip_get_data(chip); - unsigned char data; + u8 data; spin_lock(&block->lock); @@ -226,7 +226,7 @@ static int sch311x_gpio_direction_out(struct gpio_chip *chip, unsigned offset, static int sch311x_gpio_get_direction(struct gpio_chip *chip, unsigned offset) { struct sch311x_gpio_block *block = gpiochip_get_data(chip); - unsigned char data; + u8 data; spin_lock(&block->lock); data = inb(block->runtime_reg + block->config_regs[offset]); @@ -240,7 +240,7 @@ static int sch311x_gpio_set_config(struct gpio_chip *chip, unsigned offset, { struct sch311x_gpio_block *block = gpiochip_get_data(chip); enum pin_config_param param = pinconf_to_config_param(config); - unsigned char data; + u8 data; switch (param) { case PIN_CONFIG_DRIVE_OPEN_DRAIN: @@ -353,7 +353,7 @@ static int __init sch311x_detect(int sio_config_port, unsigned short *addr) { int err = 0, reg; unsigned short base_addr; - unsigned char dev_id; + u8 dev_id; err = sch311x_sio_enter(sio_config_port); if (err)