From patchwork Wed May 3 17:02:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mukesh Ojha X-Patchwork-Id: 679230 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44BABC7EE37 for ; Wed, 3 May 2023 17:06:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229949AbjECRGP (ORCPT ); Wed, 3 May 2023 13:06:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44442 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229928AbjECRGO (ORCPT ); Wed, 3 May 2023 13:06:14 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C5A255AD; Wed, 3 May 2023 10:05:42 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 343Fai30019527; Wed, 3 May 2023 17:04:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=pnFO+DGPNd0UnzwouvqS8k1qPC+HUL5CLbVNoGqlidQ=; b=de5KVOajhpHQ/pPQV1HvgNbDUN7bAMObw4fPjH4xy7581gofrLlVrcjuImMD5GO7GPQT YG5Ews7XoNTIB8hoRUYO7OaEn0HbM0rZuH1Ow/pTvQERDfUAIHpZvXm6e7tVS5oGNFt9 qZbsw0wLf5p0xB6UI8ackEX519mqlFVS9XxOoinUxAEoKthNPXHxIbxB8Dmw0Uib+aYJ 0j+A45slH7aOnvyURjKj3zA5ydTtCVQLgQgVeTbvUghZS7zU3TNCouB/G7xCaeSkEQir Kd2wEes28RwwMd31/0ABGtRcf1/YaUipPyr/c6bqS5F27DkcRjVYMRyY3kWtTEKb9F/H 7Q== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qbeb2sx7p-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 03 May 2023 17:04:23 +0000 Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 343H4N0N004206 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 3 May 2023 17:04:23 GMT Received: from hu-mojha-hyd.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 3 May 2023 10:04:17 -0700 From: Mukesh Ojha To: , , , , , , , , , , , , , CC: , , , , , , "Mukesh Ojha" Subject: [PATCH v3 15/18] pinctrl: qcom: Use qcom_scm_io_update_field() Date: Wed, 3 May 2023 22:32:29 +0530 Message-ID: <1683133352-10046-16-git-send-email-quic_mojha@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> References: <1683133352-10046-1-git-send-email-quic_mojha@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 0Dk1vzNH1BoBMIVuq1Z0_xcxnx52KIEJ X-Proofpoint-GUID: 0Dk1vzNH1BoBMIVuq1Z0_xcxnx52KIEJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-05-03_12,2023-05-03_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 spamscore=0 bulkscore=0 mlxscore=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=881 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2305030146 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Use qcom_scm_io_update_field() exported function introduced in last commit. Acked-by: Linus Walleij Signed-off-by: Mukesh Ojha --- drivers/pinctrl/qcom/pinctrl-msm.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 4515f37..856ebbf 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -1042,6 +1042,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) unsigned long flags; bool was_enabled; u32 val; + u32 mask; if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) { set_bit(d->hwirq, pctrl->dual_edge_irqs); @@ -1075,23 +1076,19 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) * With intr_target_use_scm interrupts are routed to * application cpu using scm calls. */ + mask = (7 << g->intr_target_bit); if (pctrl->intr_target_use_scm) { u32 addr = pctrl->phys_base[0] + g->intr_target_reg; int ret; - qcom_scm_io_readl(addr, &val); - - val &= ~(7 << g->intr_target_bit); - val |= g->intr_target_kpss_val << g->intr_target_bit; - - ret = qcom_scm_io_writel(addr, val); + ret = qcom_scm_io_update_field(addr, mask, g->intr_target_kpss_val); if (ret) dev_err(pctrl->dev, "Failed routing %lu interrupt to Apps proc", d->hwirq); } else { val = msm_readl_intr_target(pctrl, g); - val &= ~(7 << g->intr_target_bit); + val &= ~mask; val |= g->intr_target_kpss_val << g->intr_target_bit; msm_writel_intr_target(val, pctrl, g); }