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Tue, 28 Jan 2020 05:24:44 +0000 From: Yash Shah To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, palmer@dabbelt.com, paul.walmsley@sifive.com Cc: wesley@sifive.com, maz@kernel.org, atish.patra@wdc.com, linux-gpio@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, sachin.ghadi@sifive.com, Yash Shah Subject: [PATCH] gpio/sifive: fix static checker warning Date: Tue, 28 Jan 2020 10:54:21 +0530 Message-Id: <1580189061-14091-1-git-send-email-yash.shah@sifive.com> X-Mailer: git-send-email 2.7.4 X-ClientProxiedBy: SG2PR01CA0107.apcprd01.prod.exchangelabs.com (2603:1096:3:15::33) To CH2PR13MB3368.namprd13.prod.outlook.com (2603:10b6:610:2c::26) MIME-Version: 1.0 Received: from osubuntu003.open-silicon.com (159.117.144.156) by SG2PR01CA0107.apcprd01.prod.exchangelabs.com (2603:1096:3:15::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.2665.20 via Frontend Transport; Tue, 28 Jan 2020 05:24:40 +0000 X-Mailer: git-send-email 2.7.4 X-Originating-IP: [159.117.144.156] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: cbfd3523-c66f-4e50-722a-08d7a3b2621f X-MS-TrafficTypeDiagnostic: CH2PR13MB3592: X-LD-Processed: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1,ExtAddr X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5236; 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Fixes: 96868dce644d ("gpio/sifive: Add GPIO driver for SiFive SoCs") Reported-by: Dan Carpenter Signed-off-by: Yash Shah --- drivers/gpio/gpio-sifive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index 147a1bd..c54dd08 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -35,7 +35,7 @@ struct sifive_gpio { void __iomem *base; struct gpio_chip gc; struct regmap *regs; - u32 irq_state; + unsigned long irq_state; unsigned int trigger[SIFIVE_GPIO_MAX]; unsigned int irq_parent[SIFIVE_GPIO_MAX]; }; @@ -94,7 +94,7 @@ static void sifive_gpio_irq_enable(struct irq_data *d) spin_unlock_irqrestore(&gc->bgpio_lock, flags); /* Enable interrupts */ - assign_bit(offset, (unsigned long *)&chip->irq_state, 1); + assign_bit(offset, &chip->irq_state, 1); sifive_gpio_set_ie(chip, offset); } @@ -104,7 +104,7 @@ static void sifive_gpio_irq_disable(struct irq_data *d) struct sifive_gpio *chip = gpiochip_get_data(gc); int offset = irqd_to_hwirq(d) % SIFIVE_GPIO_MAX; - assign_bit(offset, (unsigned long *)&chip->irq_state, 0); + assign_bit(offset, &chip->irq_state, 0); sifive_gpio_set_ie(chip, offset); irq_chip_disable_parent(d); }