From patchwork Tue Apr 5 13:10:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 65068 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp455836lbc; Tue, 5 Apr 2016 06:11:04 -0700 (PDT) X-Received: by 10.66.122.100 with SMTP id lr4mr59994206pab.99.1459861864563; Tue, 05 Apr 2016 06:11:04 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id dd5si7760892pad.117.2016.04.05.06.11.04; Tue, 05 Apr 2016 06:11:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758297AbcDENLD (ORCPT + 4 others); Tue, 5 Apr 2016 09:11:03 -0400 Received: from mail-lf0-f50.google.com ([209.85.215.50]:33618 "EHLO mail-lf0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752023AbcDENLB (ORCPT ); Tue, 5 Apr 2016 09:11:01 -0400 Received: by mail-lf0-f50.google.com with SMTP id e190so8262396lfe.0 for ; Tue, 05 Apr 2016 06:11:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=DK1kFIEmasGZWCLVvqrxrfI9TAn5NT12P2gm1cvY7OE=; b=fR6Gyc21P263obVEVVcPvWaQ2i8WajbbXU2Scwtk1n4PWj5MzlqnvksvJxiOjmG8jD /jUR5vng8V5CAKCeaa3XIAw7WliRgwBe7Lr45Y4t5f+Rujs6zTlOX/lnbkdslGD7Cb4V GUGy8xilh1tpqErbeH90rCBYs3p/WlRsmgK/s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=DK1kFIEmasGZWCLVvqrxrfI9TAn5NT12P2gm1cvY7OE=; b=OEEdWLFPiUPnodGOaxNWZoMHqVTMGxROWz+V2b8ZM77gjjC6psqMZ/2u7AkS7MAU9o HbcBh1s+womq4Yz/VWG1EfMs1ky1uFandPFNVeNk3czz1ormhtlpyk8EiaEdcdt/8zHg NXGJfibN/YRbhO3XHXNZzmTHoIFKxvrNkDFj6OtQQl0+q7L9+CZHZXv6vcrk723KvlSU Q6PqC08qRuCH5Qn1LYlQahX9zPQoEKKPxzu/pgjqcIAVywebHUTkRsCsOZ508S/CE24P qBne1SO9zjzEgeBY+TcXMoMfemkn73MA3uDvGITBH5+VJ16g4Twd0scfGCcuM0qisLe0 cBEA== X-Gm-Message-State: AD7BkJIa9am6dFDHRw8ElAW8xDo+0Wgg4iAvCzdgTsW71h6PF3tK+M61I6wwsRra3RJY9uox X-Received: by 10.25.21.231 with SMTP id 100mr11179253lfv.146.1459861860410; Tue, 05 Apr 2016 06:11:00 -0700 (PDT) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id n185sm5468884lfd.11.2016.04.05.06.10.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 05 Apr 2016 06:10:59 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org, Alexandre Courbot Cc: Linus Walleij Subject: [PATCH] gpio: tc3589x: use BIT() macro Date: Tue, 5 Apr 2016 15:10:55 +0200 Message-Id: <1459861855-1975-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This switch to use BIT(n) instead of (1 << n) which is less to the point. Most GPIO drivers do this to avoid mistakes. Also switch from using to the apropriate include. Signed-off-by: Linus Walleij --- drivers/gpio/gpio-tc3589x.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Reviewed-by: Bjorn Andersson diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c index 4f566e6b81f1..3d84bae89067 100644 --- a/drivers/gpio/gpio-tc3589x.c +++ b/drivers/gpio/gpio-tc3589x.c @@ -10,10 +10,11 @@ #include #include #include -#include +#include #include #include #include +#include /* * These registers are modified under the irq bus lock and cached to avoid @@ -39,7 +40,7 @@ static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(chip); struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; - u8 mask = 1 << (offset % 8); + u8 mask = BIT(offset % 8); int ret; ret = tc3589x_reg_read(tc3589x, reg); @@ -55,7 +56,7 @@ static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; unsigned pos = offset % 8; - u8 data[] = {!!val << pos, 1 << pos}; + u8 data[] = {!!val << pos, BIT(pos)}; tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data); } @@ -70,7 +71,7 @@ static int tc3589x_gpio_direction_output(struct gpio_chip *chip, tc3589x_gpio_set(chip, offset, val); - return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos); + return tc3589x_set_bits(tc3589x, reg, BIT(pos), BIT(pos)); } static int tc3589x_gpio_direction_input(struct gpio_chip *chip, @@ -100,7 +101,7 @@ static int tc3589x_gpio_irq_set_type(struct irq_data *d, unsigned int type) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int regoffset = offset / 8; - int mask = 1 << (offset % 8); + int mask = BIT(offset % 8); if (type == IRQ_TYPE_EDGE_BOTH) { tc3589x_gpio->regs[REG_IBE][regoffset] |= mask; @@ -165,7 +166,7 @@ static void tc3589x_gpio_irq_mask(struct irq_data *d) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int regoffset = offset / 8; - int mask = 1 << (offset % 8); + int mask = BIT(offset % 8); tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask; } @@ -176,7 +177,7 @@ static void tc3589x_gpio_irq_unmask(struct irq_data *d) struct tc3589x_gpio *tc3589x_gpio = gpiochip_get_data(gc); int offset = d->hwirq; int regoffset = offset / 8; - int mask = 1 << (offset % 8); + int mask = BIT(offset % 8); tc3589x_gpio->regs[REG_IE][regoffset] |= mask; }