From patchwork Thu Feb 11 10:37:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 61717 Delivered-To: patch@linaro.org Received: by 10.112.43.199 with SMTP id y7csp109381lbl; Thu, 11 Feb 2016 02:37:26 -0800 (PST) X-Received: by 10.66.118.198 with SMTP id ko6mr65284798pab.122.1455187042877; Thu, 11 Feb 2016 02:37:22 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rp7si11811457pab.99.2016.02.11.02.37.22; Thu, 11 Feb 2016 02:37:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751061AbcBKKhW (ORCPT + 4 others); Thu, 11 Feb 2016 05:37:22 -0500 Received: from mail-lf0-f42.google.com ([209.85.215.42]:34068 "EHLO mail-lf0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750979AbcBKKhV (ORCPT ); Thu, 11 Feb 2016 05:37:21 -0500 Received: by mail-lf0-f42.google.com with SMTP id j78so28768834lfb.1 for ; Thu, 11 Feb 2016 02:37:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=n5CEkFMUDgZnfk7NcRw8PVd/bs8FVlX0j56w+PwyRZY=; b=NYSjaEXvNPcmX85P9RAnxONNsJTjJxCbDCvXoY93GzLtUyNMQ2W5StfoK+e+tneMBy j17jUvvoRzWQIB/0zj5WGBCWP41bLYadsuHol0WUb2eWNsmIKhHfcibwXrwdjCw+SyJG 1TEbGkWVYmFH4h7qy8mRAmnCKlB/PIqr/nNNg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=n5CEkFMUDgZnfk7NcRw8PVd/bs8FVlX0j56w+PwyRZY=; b=d9YlBBl1qS/Mlht93vpTjSp1KEb4RsvT5LmYge33gzLwlCBtWAYt4UGymdzZGXPKff I1U93UJeaVFyV4r0xLdI2zyiWfYT3nJevfzcnk3ikBAhJ7hWBS9N1AumrCN/DO42M4Xg bxmJYkwAvPjmcYVnP6AB0fWsRATJ2wcMvbSol7p0HEfWOC/Cj1ZftYdoQB1p8+Uoj+LP /AldgaQxPcOh03XHJswZZBE7Bto3XykD2ZEeUj1ZdQJyoFxqZVOJZLmWK77ROiZNDXdK vidB2VpE+GXgATlvlksC7exq3kpuTSSYNtWqNAHhd6R4/eKb5dc2/XsQ3yjT0wsGS55X yXEg== X-Gm-Message-State: AG10YOR7CLcU9TXZY+IFAlKfHE2sCTK5Y3fauJ9MsAziuWSYmnxjDB7xESoLU0gmI0NJIF8U X-Received: by 10.25.148.208 with SMTP id w199mr13878873lfd.124.1455187040380; Thu, 11 Feb 2016 02:37:20 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id ax1sm1114880lbc.20.2016.02.11.02.37.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Feb 2016 02:37:19 -0800 (PST) From: Linus Walleij To: linux-gpio@vger.kernel.org, Alexandre Courbot , Johan Hovold , Michael Welling , Markus Pargmann Cc: Bamvor Jian Zhang , Grant Likely , Linus Walleij Subject: [PATCH 6/6 v2] gpio: move the pin ranges into gpio_device Date: Thu, 11 Feb 2016 11:37:14 +0100 Message-Id: <1455187034-29022-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Instead of keeping this reference to the pin ranges in the client driver-supplied gpio_chip, move it to the internal gpio_device as the drivers have no need to inspect this. Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Actually commit the entire patch, grrr. --- drivers/gpio/gpiolib.c | 10 +++++----- drivers/gpio/gpiolib.h | 10 ++++++++++ include/linux/gpio/driver.h | 9 --------- 3 files changed, 15 insertions(+), 14 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 157ab40d19b1..08e93857a7d5 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -532,8 +532,7 @@ int gpiochip_add_data(struct gpio_chip *chip, void *data) spin_unlock_irqrestore(&gpio_lock, flags); #ifdef CONFIG_PINCTRL - /* FIXME: move pin ranges to gpio_device */ - INIT_LIST_HEAD(&chip->pin_ranges); + INIT_LIST_HEAD(&gdev->pin_ranges); #endif status = gpiochip_set_desc_names(chip); @@ -1036,7 +1035,7 @@ int gpiochip_add_pingroup_range(struct gpio_chip *chip, gpio_offset, gpio_offset + pin_range->range.npins - 1, pinctrl_dev_get_devname(pctldev), pin_group); - list_add_tail(&pin_range->node, &chip->pin_ranges); + list_add_tail(&pin_range->node, &gdev->pin_ranges); return 0; } @@ -1085,7 +1084,7 @@ int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, pinctl_name, pin_offset, pin_offset + npins - 1); - list_add_tail(&pin_range->node, &chip->pin_ranges); + list_add_tail(&pin_range->node, &gdev->pin_ranges); return 0; } @@ -1098,8 +1097,9 @@ EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); void gpiochip_remove_pin_ranges(struct gpio_chip *chip) { struct gpio_pin_range *pin_range, *tmp; + struct gpio_device *gdev = chip->gpiodev; - list_for_each_entry_safe(pin_range, tmp, &chip->pin_ranges, node) { + list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { list_del(&pin_range->node); pinctrl_remove_gpio_range(pin_range->pctldev, &pin_range->range); diff --git a/drivers/gpio/gpiolib.h b/drivers/gpio/gpiolib.h index d154984c71d9..5a36908fd39d 100644 --- a/drivers/gpio/gpiolib.h +++ b/drivers/gpio/gpiolib.h @@ -55,6 +55,16 @@ struct gpio_device { int base; u16 ngpio; struct list_head list; + +#ifdef CONFIG_PINCTRL + /* + * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally + * describe the actual pin range which they serve in an SoC. This + * information would be used by pinctrl subsystem to configure + * corresponding pins for gpio usage. + */ + struct list_head pin_ranges; +#endif }; /** diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index bfc842c2fc57..1babd000bbbe 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -181,15 +181,6 @@ struct gpio_chip { int (*of_xlate)(struct gpio_chip *gc, const struct of_phandle_args *gpiospec, u32 *flags); #endif -#ifdef CONFIG_PINCTRL - /* - * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally - * describe the actual pin range which they serve in an SoC. This - * information would be used by pinctrl subsystem to configure - * corresponding pins for gpio usage. - */ - struct list_head pin_ranges; -#endif }; extern const char *gpiochip_is_requested(struct gpio_chip *chip,