From patchwork Tue Dec 22 14:40:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 58909 Delivered-To: patch@linaro.org Received: by 10.112.89.199 with SMTP id bq7csp3275723lbb; Tue, 22 Dec 2015 06:40:15 -0800 (PST) X-Received: by 10.66.62.166 with SMTP id z6mr36057407par.122.1450795215124; Tue, 22 Dec 2015 06:40:15 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 128si1609663pfa.10.2015.12.22.06.40.14; Tue, 22 Dec 2015 06:40:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754086AbbLVOkO (ORCPT + 4 others); Tue, 22 Dec 2015 09:40:14 -0500 Received: from mail-lf0-f50.google.com ([209.85.215.50]:36150 "EHLO mail-lf0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754057AbbLVOkN (ORCPT ); Tue, 22 Dec 2015 09:40:13 -0500 Received: by mail-lf0-f50.google.com with SMTP id z124so125677299lfa.3 for ; Tue, 22 Dec 2015 06:40:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=6fF21fS+icBxv/HXRanKYxR+5fZDrJSQ6+lMyPEpLXY=; b=ZAAtlSfoSPXxVWoGg/dgNdT4JeES9Yld0NrElkmXAGAM2E/FrWkfCe0S5nnvi3C8Fw RKgG5BTd9QIHsll4omwY8r1R6q178iv9BG7UFq3LbCKP15svtdZ4/XxJbrg1x0RDDDok flfmeTbMnwfYG5zxWP4Fhv9a7OiZRxSnJ86pc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=6fF21fS+icBxv/HXRanKYxR+5fZDrJSQ6+lMyPEpLXY=; b=WtJvzyPpRIEyJFMnCM8eNeArriG2h2GF20agY6oXtugblls5UscLTAQl3u9JjOhhan GGiH00me9Y95caHBv1HvSI7rWy3AzhpwIkLuE3JmZHFmz27TQyGHwJm3med4jprjltX+ lqxwdpop74l8K97wvCu+iycA5jkgXNY52VG+7X/ujrhcdb925BPuOvRrew8N4J8NhPoO 05CA8I9yzFf/wfn/ITxVo7JBjkcJ1HwHQLxA+KwGFoIiFv7nNqoTW2IJEOPL8esjMGS+ Pr+JvvrVFA0ZdXJ0CCPSeCrx5hmSGKHe7wbY+oJ7QfF6x8UVSaUPgDu6oQNxRDX/Q2E/ s2cA== X-Gm-Message-State: ALoCoQnPznkPSrpDIpFrDgVbDpBK+DCGxegS4vuxcUYdGb21YOaQ/cPiGvHdxjNFNZ+O6e6EQIeW+0D1+KDJEBn9Ruecx64lmA== X-Received: by 10.25.19.154 with SMTP id 26mr8950681lft.127.1450795212257; Tue, 22 Dec 2015 06:40:12 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id xn8sm5755167lbb.41.2015.12.22.06.40.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Dec 2015 06:40:11 -0800 (PST) From: Linus Walleij To: linux-gpio@vger.kernel.org, linux-mips@linux-mips.org, Ralf Baechle Cc: Linus Walleij Subject: [PATCH 36/54] mips: alchemy: Be sure to clamp return value Date: Tue, 22 Dec 2015 15:40:02 +0100 Message-Id: <1450795202-27345-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org As we want gpio_chip .get() calls to be able to return negative error codes and propagate to drivers, we need to go over all drivers and make sure their return values are clamped to [0,1]. We do this by using the ret = !!(val) design pattern. Cc: linux-mips@linux-mips.org Cc: Ralf Baechle Signed-off-by: Linus Walleij --- MIPS folks: as mentioned in 00/54: either apply this directly or ACK it and I will take it into the GPIO tree. --- arch/mips/alchemy/common/gpiolib.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c index f9bc4f520440..84548f704035 100644 --- a/arch/mips/alchemy/common/gpiolib.c +++ b/arch/mips/alchemy/common/gpiolib.c @@ -40,7 +40,7 @@ static int gpio2_get(struct gpio_chip *chip, unsigned offset) { - return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE); + return !!alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE); } static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value) @@ -68,7 +68,7 @@ static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset) static int gpio1_get(struct gpio_chip *chip, unsigned offset) { - return alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE); + return !!alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE); } static void gpio1_set(struct gpio_chip *chip, @@ -119,7 +119,7 @@ struct gpio_chip alchemy_gpio_chip[] = { static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off) { - return au1300_gpio_get_value(off + AU1300_GPIO_BASE); + return !!au1300_gpio_get_value(off + AU1300_GPIO_BASE); } static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)