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[209.132.180.67]) by mx.google.com with ESMTP id ph6si12788581pac.148.2015.12.09.05.39.09; Wed, 09 Dec 2015 05:39:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro-org.20150623.gappssmtp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753331AbbLINjJ (ORCPT + 4 others); Wed, 9 Dec 2015 08:39:09 -0500 Received: from mail-lb0-f182.google.com ([209.85.217.182]:35532 "EHLO mail-lb0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751673AbbLINjI (ORCPT ); Wed, 9 Dec 2015 08:39:08 -0500 Received: by lbpu9 with SMTP id u9so29942145lbp.2 for ; Wed, 09 Dec 2015 05:39:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=HGuqBvb16iul3XQ6EsbBlPDWr3Quph4et65LJrfbZrU=; b=fyscu2QO3uzKC6KBeMeUK9iSC8FYWMzwFvBdCsDS1CBScR/6SKcPeHIeu9GfUgzphG aP1wTDpg19Io7pE56t+qKsZJ+26CYm0cER49EotBYlt24aMMitkocLMAyc0w/4ODYGYe AcIu/PGwlT+qlq7AC926Qs09M3aK5aFkXK52IlLzcpBmhhkkYPBoXYndBGW7rzKYAEF9 aC9UAt0YsQTRP03GpbbKEb6OhzCUoK8I+btcvPZRWmAeu9XGXNPkexuBURyhrZwe1di+ K6nxxHiPkY2mILDMwTU/SP0QrmLTjcvHA9Wl+XGUZND/wSjIgw1ptk1KZyJtwf99IiA0 ce9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=HGuqBvb16iul3XQ6EsbBlPDWr3Quph4et65LJrfbZrU=; b=T6Zj76CZeWKXxXXC6CtghPDDwp4IYrneULxcDggeIVBlEwEDfNGUrW7i+C7uigKN9+ 0CvCUBzwAX3SNi/fa+riX58W75D4swZ5+GJM/1xUe7c3b/ILWKoKLawTcrqV7qfQ+tpT j2R6qC7P5x/AAv22Hyti8zXRAh/5SfkQ+dIAjr6MYDfwxUIippYReia/U+SVn2mAh30w YRRY5Bam/05ybe3IjwgZdJTpRwarxzMD1gZTdpfQtd4uDB5G212wIzFC9i4ncCQALMQx GiPreC65uDdxHsYjXO4S/rOVEWVmf8/wqoqPXU/IU0vLnanfayPGoMNxI9sTStzgZsqC nNVg== X-Gm-Message-State: ALoCoQnojM8DlMnG5y2gwFwoEzmcSymMbVZvVWQDizHfzBrhRDq9iq1LFOoW5hox+WnToJ+UCJjbk8fGfES8rxzzcUq0H5Wh6A== X-Received: by 10.112.218.5 with SMTP id pc5mr2437995lbc.76.1449668346993; Wed, 09 Dec 2015 05:39:06 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id t12sm1449333lbs.5.2015.12.09.05.39.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 09 Dec 2015 05:39:06 -0800 (PST) From: Linus Walleij To: linux-gpio@vger.kernel.org, Johan Hovold , Alexandre Courbot , Michael Welling , Markus Pargmann , Ralf Baechle Cc: Linus Walleij , linux-mips@linux-mips.org Subject: [PATCH 135/182] MIPS: alchemy: switch to gpiochip_add_data() Date: Wed, 9 Dec 2015 14:39:02 +0100 Message-Id: <1449668342-4446-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We're planning to remove the gpiochip_add() function to swith to gpiochip_add_data() with NULL for data argument. Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Signed-off-by: Linus Walleij --- Ralf: please ACK this so I can take it through the GPIO tree. BTW: would be nice if the MIPS GPIO drivers could move down to drivers/gpio in the long run. --- arch/mips/alchemy/common/gpiolib.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c index f9bc4f520440..e2606f8eb2fa 100644 --- a/arch/mips/alchemy/common/gpiolib.c +++ b/arch/mips/alchemy/common/gpiolib.c @@ -160,14 +160,14 @@ static int __init alchemy_gpiochip_init(void) switch (alchemy_get_cputype()) { case ALCHEMY_CPU_AU1000: - ret = gpiochip_add(&alchemy_gpio_chip[0]); + ret = gpiochip_add_data(&alchemy_gpio_chip[0], NULL); break; case ALCHEMY_CPU_AU1500...ALCHEMY_CPU_AU1200: - ret = gpiochip_add(&alchemy_gpio_chip[0]); - ret |= gpiochip_add(&alchemy_gpio_chip[1]); + ret = gpiochip_add_data(&alchemy_gpio_chip[0], NULL); + ret |= gpiochip_add_data(&alchemy_gpio_chip[1], NULL); break; case ALCHEMY_CPU_AU1300: - ret = gpiochip_add(&au1300_gpiochip); + ret = gpiochip_add_data(&au1300_gpiochip, NULL); break; } return ret;