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[209.132.180.67]) by mx.google.com with ESMTP id 81si12819810pfr.79.2015.12.09.05.33.54; Wed, 09 Dec 2015 05:33:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro-org.20150623.gappssmtp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754451AbbLINdx (ORCPT + 4 others); Wed, 9 Dec 2015 08:33:53 -0500 Received: from mail-lf0-f47.google.com ([209.85.215.47]:33436 "EHLO mail-lf0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754205AbbLINdx (ORCPT ); Wed, 9 Dec 2015 08:33:53 -0500 Received: by lfaz4 with SMTP id z4so34325320lfa.0 for ; Wed, 09 Dec 2015 05:33:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=2NRMOXfWf9toa5Af4N3VIzQP/yA40c/5SwUfLEbqUFU=; b=Gsv7IHIf+RGmBlGL33dr44sd4FgJTmsdXCQQQAf8bntB6OD09qY0dAlcWqq4HZbRLF hUTcgQaCTJc2PEw4wBxrpC7Qwyzp+xrAVsKUtdPvE7iGnR0UZmPIIDA7Tl+NlfJwc8Sm Npbj5YpUHvr/ryaw7C3PU0uYvNlYgt5aUWxVLTOvNSzDt3hYIRVUfdm31x54PqePg/qD Ve2FZejtR6WsNrKegTjKenrejYhACc8oUx48UGoE/CTsx/Iw05BBibp1V1zRUFshltnc VpyO2O9Pmk9b+3DA6Kct+HDPsEQ1xYCszMUfkttk+HtEU8ULufjMDu14pYvrZG8GrnJa 6Dcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=2NRMOXfWf9toa5Af4N3VIzQP/yA40c/5SwUfLEbqUFU=; b=izGTfBFvSTpHWaE8EH8/6SA8FxyADIpbllJtaY7GQWQgRZEysSM2f4ghd0fK3PVACw 721/kPN7uvRrRq+g/ED+tkga0rG2PrInM4HjXt1fgaER0e9SWCDODIkpO5uNCFt1RE3A FFZAO1DkB3XgWAVts8qTnW5yht7TqE0hpdkIzHVw59ZmOFpors4kemGcVGgaxM/jNjEH N4Wi5DH9u6KmuBMWZ4gRt6Iv/9xaNGwhIdJqbq3K8LmYdw/FB4asyA18zLJNtEizP0+I e24PN54q3BlusdfDjVFoEXReS/ItXwFQJyr22nkZqKV4OLJ9Meh7VJSJ77onxLIqK2nf uzkQ== X-Gm-Message-State: ALoCoQldggyoG6ik9hrJrAKPxqc3ufIvA0aTikIFlRc4XVma7f10ta8MOU2SCFFJbSGQsC15RSQnfewXUL2hOZ9hg7xH5+LnvA== X-Received: by 10.25.167.209 with SMTP id q200mr2322172lfe.15.1449668031726; Wed, 09 Dec 2015 05:33:51 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id g7sm1433470lfi.27.2015.12.09.05.33.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 09 Dec 2015 05:33:51 -0800 (PST) From: Linus Walleij To: linux-gpio@vger.kernel.org, Johan Hovold , Alexandre Courbot , Michael Welling , Markus Pargmann Cc: Linus Walleij , Viresh Kumar , spear-devel@list.st.com Subject: [PATCH 117/182] pinctrl: spear-plgpio: use gpiochip data pointer Date: Wed, 9 Dec 2015 14:33:48 +0100 Message-Id: <1449668028-3340-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: Viresh Kumar Cc: spear-devel@list.st.com Signed-off-by: Linus Walleij --- drivers/pinctrl/spear/pinctrl-plgpio.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) -- 2.4.3 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Viresh Kumar diff --git a/drivers/pinctrl/spear/pinctrl-plgpio.c b/drivers/pinctrl/spear/pinctrl-plgpio.c index 925f597de266..4c9b863f8267 100644 --- a/drivers/pinctrl/spear/pinctrl-plgpio.c +++ b/drivers/pinctrl/spear/pinctrl-plgpio.c @@ -107,7 +107,7 @@ static inline void plgpio_reg_reset(void __iomem *base, u32 pin, u32 reg) /* gpio framework specific routines */ static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) { - struct plgpio *plgpio = container_of(chip, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(chip); unsigned long flags; /* get correct offset for "offset" pin */ @@ -127,7 +127,7 @@ static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) static int plgpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) { - struct plgpio *plgpio = container_of(chip, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(chip); unsigned long flags; unsigned dir_offset = offset, wdata_offset = offset, tmp; @@ -159,7 +159,7 @@ static int plgpio_direction_output(struct gpio_chip *chip, unsigned offset, static int plgpio_get_value(struct gpio_chip *chip, unsigned offset) { - struct plgpio *plgpio = container_of(chip, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(chip); if (offset >= chip->ngpio) return -EINVAL; @@ -176,7 +176,7 @@ static int plgpio_get_value(struct gpio_chip *chip, unsigned offset) static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) { - struct plgpio *plgpio = container_of(chip, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(chip); if (offset >= chip->ngpio) return; @@ -196,7 +196,7 @@ static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) static int plgpio_request(struct gpio_chip *chip, unsigned offset) { - struct plgpio *plgpio = container_of(chip, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(chip); int gpio = chip->base + offset; unsigned long flags; int ret = 0; @@ -248,7 +248,7 @@ err0: static void plgpio_free(struct gpio_chip *chip, unsigned offset) { - struct plgpio *plgpio = container_of(chip, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(chip); int gpio = chip->base + offset; unsigned long flags; @@ -280,7 +280,7 @@ disable_clk: static void plgpio_irq_disable(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct plgpio *plgpio = container_of(gc, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(gc); int offset = d->hwirq; unsigned long flags; @@ -299,7 +299,7 @@ static void plgpio_irq_disable(struct irq_data *d) static void plgpio_irq_enable(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct plgpio *plgpio = container_of(gc, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(gc); int offset = d->hwirq; unsigned long flags; @@ -318,7 +318,7 @@ static void plgpio_irq_enable(struct irq_data *d) static int plgpio_irq_set_type(struct irq_data *d, unsigned trigger) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - struct plgpio *plgpio = container_of(gc, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(gc); int offset = d->hwirq; void __iomem *reg_off; unsigned int supported_type = 0, val; @@ -359,7 +359,7 @@ static struct irq_chip plgpio_irqchip = { static void plgpio_irq_handler(struct irq_desc *desc) { struct gpio_chip *gc = irq_desc_get_handler_data(desc); - struct plgpio *plgpio = container_of(gc, struct plgpio, chip); + struct plgpio *plgpio = gpiochip_get_data(gc); struct irq_chip *irqchip = irq_desc_get_chip(desc); int regs_count, count, pin, offset, i = 0; unsigned long pending; @@ -573,7 +573,7 @@ static int plgpio_probe(struct platform_device *pdev) } } - ret = gpiochip_add(&plgpio->chip); + ret = gpiochip_add_data(&plgpio->chip, plgpio); if (ret) { dev_err(&pdev->dev, "unable to add gpio chip\n"); goto unprepare_clk;