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[209.132.180.67]) by mx.google.com with ESMTP id f9si630660pds.219.2014.12.01.04.09.09 for ; Mon, 01 Dec 2014 04:09:10 -0800 (PST) Received-SPF: none (google.com: linux-gpio-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753382AbaLAMJJ (ORCPT ); Mon, 1 Dec 2014 07:09:09 -0500 Received: from mail-gw1-out.broadcom.com ([216.31.210.62]:23926 "EHLO mail-gw1-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753051AbaLAMJI (ORCPT ); Mon, 1 Dec 2014 07:09:08 -0500 X-IronPort-AV: E=Sophos;i="5.07,493,1413270000"; d="scan'208";a="52118489" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw1-out.broadcom.com with ESMTP; 01 Dec 2014 05:53:25 -0800 Received: from IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Mon, 1 Dec 2014 04:09:08 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) with Microsoft SMTP Server id 14.3.174.1; Mon, 1 Dec 2014 04:09:06 -0800 Received: from linaro.ban.broadcom.com (unknown [10.131.60.135]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id D441B4101A; Mon, 1 Dec 2014 04:08:33 -0800 (PST) From: To: Linus Walleij , Alexandre Courbot CC: Kamlakant Patel , , Subject: [PATCH v1 5/5] gpio: document basic mmio gpio library Date: Mon, 1 Dec 2014 17:39:38 +0530 Message-ID: <1417435778-21879-6-git-send-email-kamlakant.patel@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1417435778-21879-1-git-send-email-kamlakant.patel@linaro.org> References: <1417435778-21879-1-git-send-email-kamlakant.patel@linaro.org> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: kamlakant.patel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Kamlakant Patel This is a brief documentation on how to use GPIO Generic library for memory-mapped GPIO controllers. Signed-off-by: Kamlakant Patel --- Documentation/gpio/driver.txt | 50 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/gpio/driver.txt b/Documentation/gpio/driver.txt index 31e0b5d..563abea 100644 --- a/Documentation/gpio/driver.txt +++ b/Documentation/gpio/driver.txt @@ -190,3 +190,53 @@ gpiochip_free_own_desc(). These functions must be used with care since they do not affect module use count. Do not use the functions to request gpio descriptors not owned by the calling driver. + + +Generic driver for memory-mapped GPIO controllers +------------------------------------------------- +The GPIO generic library provides support for basic platform_device +memory-mapped GPIO controllers, which can be accessed by selecting Kconfig +symbol GPIO_GENERIC and using library functions provided by GPIO generic +driver (see drivers/gpio/gpio-generic.c). +The simplest form of a GPIO controller that the driver support is just a +single "data" register, where GPIO state can be read and/or written. + +The driver can be registered using "basic-mmio-gpio" or for big-endian +notation support use "basic-mmio-gpio-be". The code will configure gpio_chip +and issue gpiochip_add(). + +The driver supports: +- 8/16/32/64 bits registers. The number of GPIOs is determined by the width of + the registers. +- GPIO controllers with clear/set registers. +- GPIO controllers with a single "data" register. +- Big endian bits/GPIOs ordering. + +For setting GPIO's there are three supported configurations: +- single input/output register resource (named "dat"). +- set/clear pair (named "set" and "clr"). +- single output register resource and single input resource ("set" and dat"). + +For setting the GPIO direction, there are three supported configurations: +- simple bidirection GPIO that requires no configuration. +- an output direction register (named "dirout") where a 1 bit indicates the + GPIO is an output. +- an input direction register (named "dirin") where a 1 bit indicates the GPIO + is an input. + +It is possible to use only parts of GPIO generic library. Each GPIO controller +using GPIO generic library needs to include the following header. + + #include + +Use bgpio_init to configure gpio_chip and bgpio_remove to remove the controller. +int bgpio_init(struct bgpio_chip *bgc, struct device *dev, + unsigned long sz, void __iomem *dat, void __iomem *set, + void __iomem *clr, void __iomem *dirout, void __iomem *dirin, + unsigned long flags); + +The "flag" parameter can be following depending on controller configuration: +BGPIOF_BIG_ENDIAN BIT(0) +BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */ +BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */ +BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)